X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fjtag%2Fbitbang.c;h=69c17298849007592828bd3d4d58529b0b84fd93;hb=4bc80e5a65dde09ca795e50e77bcfe77b8dd444f;hp=8fbe83deeb68aca2571fe5802ea50eddb832deea;hpb=84df52f9ea78e2d71bde648a16b69d80404c6421;p=openocd.git

diff --git a/src/jtag/bitbang.c b/src/jtag/bitbang.c
index 8fbe83deeb..69c1729884 100644
--- a/src/jtag/bitbang.c
+++ b/src/jtag/bitbang.c
@@ -2,7 +2,7 @@
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
- *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
+ *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
  *   oyvind.harboe@zylin.com                                               *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
@@ -39,19 +39,19 @@
 static void bitbang_stableclocks(int num_cycles);
 
 
-bitbang_interface_t *bitbang_interface;
+struct bitbang_interface *bitbang_interface;
 
 /* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work!
  *
  * Set this to 1 and str912 reset halt will fail.
  *
  * If someone can submit a patch with an explanation it will be greatly
- * appreciated, but as far as I can tell (ØH) DCLK is generated upon
+ * appreciated, but as far as I can tell (ØH) DCLK is generated upon
  * clk = 0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
  * The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
  * state". With hardware there is no such thing as *while* in a state. There
  * are only edges. So clk => 0 is in fact a very subtle state transition that
- * happens *while* in the TAP_IDLE state. "#&¤"#¤&"#&"#&
+ * happens *while* in the TAP_IDLE state. "#&¤"#¤&"#&"#&
  *
  * For "reset halt" the last thing that happens before srst is asserted
  * is that the breakpoint is set up. If DCLK is not wiggled one last
@@ -91,7 +91,7 @@ static void bitbang_state_move(int skip)
 	tap_set_state(tap_get_end_state());
 }
 
-static void bitbang_path_move(pathmove_command_t *cmd)
+static void bitbang_path_move(struct pathmove_command *cmd)
 {
 	int num_states = cmd->num_states;
 	int state_count;
@@ -230,7 +230,7 @@ static void bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int
 
 int bitbang_execute_queue(void)
 {
-	jtag_command_t *cmd = jtag_command_queue; /* currently processed command */
+	struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
 	int scan_size;
 	enum scan_type type;
 	uint8_t *buffer;
@@ -266,7 +266,7 @@ int bitbang_execute_queue(void)
 				break;
 			case JTAG_RUNTEST:
 #ifdef _DEBUG_JTAG_IO_
-				LOG_DEBUG("runtest %i cycles, end in %s", cmd->cmd.runtest->num_cycles, tap_state_name(cmd->cmd.runtest->end_state) );
+				LOG_DEBUG("runtest %i cycles, end in %s", cmd->cmd.runtest->num_cycles, tap_state_name(cmd->cmd.runtest->end_state));
 #endif
 				bitbang_end_state(cmd->cmd.runtest->end_state);
 				bitbang_runtest(cmd->cmd.runtest->num_cycles);
@@ -295,7 +295,7 @@ int bitbang_execute_queue(void)
 				break;
 			case JTAG_SCAN:
 #ifdef _DEBUG_JTAG_IO_
-				LOG_DEBUG("%s scan end in %s",  (cmd->cmd.scan->ir_scan) ? "IR" : "DR", tap_state_name(cmd->cmd.scan->end_state) );
+				LOG_DEBUG("%s scan end in %s",  (cmd->cmd.scan->ir_scan) ? "IR" : "DR", tap_state_name(cmd->cmd.scan->end_state));
 #endif
 				bitbang_end_state(cmd->cmd.scan->end_state);
 				scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
@@ -308,7 +308,7 @@ int bitbang_execute_queue(void)
 				break;
 			case JTAG_SLEEP:
 #ifdef _DEBUG_JTAG_IO_
-				LOG_DEBUG("sleep %i", cmd->cmd.sleep->us);
+				LOG_DEBUG("sleep %" PRIi32, cmd->cmd.sleep->us);
 #endif
 				jtag_sleep(cmd->cmd.sleep->us);
 				break;