X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2FMakefile.am;h=afa5f49b6b91edfb105d0c52ac82698f85444140;hb=a18c1f289dc4d32d636791462880ae4a94a338b7;hp=05f174870015938ee355d0c94ccf83c1f2d20c87;hpb=4ab75a3634901c4e3897d771e2c75a64c7353c28;p=openocd.git

diff --git a/src/target/Makefile.am b/src/target/Makefile.am
index 05f1748700..afa5f49b6b 100644
--- a/src/target/Makefile.am
+++ b/src/target/Makefile.am
@@ -75,6 +75,7 @@ ARMV7_SRC = \
 	%D%/armv7m_trace.c \
 	%D%/cortex_m.c \
 	%D%/armv7a.c \
+	%D%/armv7a_mmu.c \
 	%D%/cortex_a.c \
 	%D%/ls1_sap.c \
 	%D%/mem_ap.c
@@ -142,7 +143,8 @@ INTEL_IA32_SRC = \
 
 ESIRISC_SRC = \
 	%D%/esirisc.c \
-	%D%/esirisc_jtag.c
+	%D%/esirisc_jtag.c \
+	%D%/esirisc_trace.c
 
 %C%_libtarget_la_SOURCES += \
 	%D%/algorithm.h \
@@ -152,6 +154,7 @@ ESIRISC_SRC = \
 	%D%/arm_adi_v5.h \
 	%D%/armv7a_cache.h \
 	%D%/armv7a_cache_l2x.h \
+	%D%/armv7a_mmu.h \
 	%D%/arm_disassembler.h \
 	%D%/arm_opcodes.h \
 	%D%/arm_simulator.h \
@@ -226,7 +229,8 @@ ESIRISC_SRC = \
 	%D%/arm_cti.h \
 	%D%/esirisc.h \
 	%D%/esirisc_jtag.h \
-	%D%/esirisc_regs.h
+	%D%/esirisc_regs.h \
+	%D%/esirisc_trace.h
 
 include %D%/openrisc/Makefile.am
 include %D%/riscv/Makefile.am