X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm11.c;h=7e8c4c67d652eab1d67e1742f855a482db1bb6fb;hb=86173cdbddde781b19ac630602f2d450a59b32b5;hp=18c3bd5c459bb72ed38fa8c4e5cb0c5029664056;hpb=68b05c55759970657c32607b3ce27c42e65cdad0;p=openocd.git diff --git a/src/target/arm11.c b/src/target/arm11.c index 18c3bd5c45..7e8c4c67d6 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -1,5 +1,6 @@ /*************************************************************************** * Copyright (C) 2008 digenius technology GmbH. * + * Michael Bruck * * * * Copyright (C) 2008 Oyvind Harboe oyvind.harboe@zylin.com * * * @@ -26,6 +27,7 @@ #endif #include "arm11.h" +#include "target_type.h" #if 0 @@ -286,14 +288,14 @@ enum arm11_regcache_ids #define ARM11_GDB_REGISTER_COUNT 26 -u8 arm11_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; +uint8_t arm11_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; reg_t arm11_gdb_dummy_fp_reg = { "GDB dummy floating-point register", arm11_gdb_dummy_fp_value, 0, 1, 96, NULL, 0, NULL, 0 }; -u8 arm11_gdb_dummy_fps_value[] = {0, 0, 0, 0}; +uint8_t arm11_gdb_dummy_fps_value[] = {0, 0, 0, 0}; reg_t arm11_gdb_dummy_fps_reg = { @@ -336,7 +338,9 @@ int arm11_check_init(arm11_common_t * arm11, u32 * dscr) if (*dscr & ARM11_DSCR_CORE_HALTED) { /** \todo TODO: this needs further scrutiny because - * arm11_on_enter_debug_state() never gets properly called + * arm11_on_enter_debug_state() never gets properly called. + * As a result we don't read the actual register states from + * the target. */ arm11->target->state = TARGET_HALTED; @@ -389,8 +393,8 @@ static int arm11_on_enter_debug_state(arm11_common_t * arm11) scan_field_t chain5_fields[3]; arm11_setup_field(arm11, 32, NULL, &R(WDTR), chain5_fields + 0); - arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 1); - arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2); + arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 1); + arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2); arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE); } @@ -626,8 +630,8 @@ int arm11_leave_debug_state(arm11_common_t * arm11) scan_field_t chain5_fields[3]; - u8 Ready = 0; /* ignored */ - u8 Valid = 0; /* ignored */ + uint8_t Ready = 0; /* ignored */ + uint8_t Valid = 0; /* ignored */ arm11_setup_field(arm11, 32, &R(RDTR), NULL, chain5_fields + 0); arm11_setup_field(arm11, 1, &Ready, NULL, chain5_fields + 1); @@ -679,7 +683,7 @@ int arm11_poll(struct target_s *target) enum target_state old_state = target->state; LOG_DEBUG("enter TARGET_HALTED"); - target->state = TARGET_HALTED; + target->state = TARGET_HALTED; target->debug_reason = arm11_get_DSCR_debug_reason(dscr); arm11_on_enter_debug_state(arm11); @@ -692,7 +696,7 @@ int arm11_poll(struct target_s *target) if (target->state != TARGET_RUNNING && target->state != TARGET_DEBUG_RUNNING) { LOG_DEBUG("enter TARGET_RUNNING"); - target->state = TARGET_RUNNING; + target->state = TARGET_RUNNING; target->debug_reason = DBG_REASON_NOTHALTED; } } @@ -713,7 +717,7 @@ int arm11_arch_state(struct target_s *target) } /* target request support */ -int arm11_target_request_data(struct target_s *target, u32 size, u8 *buffer) +int arm11_target_request_data(struct target_s *target, u32 size, uint8_t *buffer) { FNC_INFO_NOTIMPLEMENTED; @@ -1086,7 +1090,7 @@ int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], i * size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit) * count: number of items of */ -int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) +int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer) { /** \todo TODO: check if buffer cast to u32* and u16* might cause alignment problems */ @@ -1169,7 +1173,7 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count, return ERROR_OK; } -int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer) +int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer) { FNC_INFO; @@ -1281,7 +1285,7 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count /* write target memory in multiples of 4 byte, optimized for writing large quantities of data */ -int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8 *buffer) +int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, uint8_t *buffer) { FNC_INFO; @@ -1369,7 +1373,6 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t int timeout_ms, void *arch_info) { arm11_common_t *arm11 = target->arch_info; - armv4_5_algorithm_t *arm11_algorithm_info = arch_info; // enum armv4_5_state core_state = arm11->core_state; // enum armv4_5_mode core_mode = arm11->core_mode; u32 context[16]; @@ -1378,11 +1381,6 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t int retval = ERROR_OK; LOG_DEBUG("Running algorithm"); - if (arm11_algorithm_info->common_magic != ARMV4_5_COMMON_MAGIC) - { - LOG_ERROR("current target isn't an ARMV4/5 target"); - return ERROR_TARGET_INVALID; - } if (target->state != TARGET_HALTED) { @@ -1397,11 +1395,11 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t // Save regs for (size_t i = 0; i < 16; i++) { - context[i] = buf_get_u32((u8*)(&arm11->reg_values[i]),0,32); + context[i] = buf_get_u32((uint8_t*)(&arm11->reg_values[i]),0,32); LOG_DEBUG("Save %zi: 0x%x",i,context[i]); } - cpsr = buf_get_u32((u8*)(arm11->reg_values+ARM11_RC_CPSR),0,32); + cpsr = buf_get_u32((uint8_t*)(arm11->reg_values+ARM11_RC_CPSR),0,32); LOG_DEBUG("Save CPSR: 0x%x", cpsr); for (int i = 0; i < num_mem_params; i++) @@ -1441,6 +1439,12 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t exit(-1); } */ + + +/* arm11 at this point only supports ARM not THUMB mode + however if this test needs to be reactivated the current state can be read back + from CPSR */ +#if 0 if (arm11_algorithm_info->core_mode != ARMV4_5_MODE_ANY) { LOG_DEBUG("setting core_mode: 0x%2.2x", arm11_algorithm_info->core_mode); @@ -1448,6 +1452,7 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t arm11->reg_list[ARM11_RC_CPSR].dirty = 1; arm11->reg_list[ARM11_RC_CPSR].valid = 1; } +#endif if ((retval = breakpoint_add(target, exit_point, exit_breakpoint_size, BKPT_HARD)) != ERROR_OK) { @@ -1516,10 +1521,10 @@ restore: { LOG_DEBUG("restoring register %s with value 0x%8.8x", arm11->reg_list[i].name, context[i]); - arm11_set_reg(&arm11->reg_list[i], (u8*)&context[i]); + arm11_set_reg(&arm11->reg_list[i], (uint8_t*)&context[i]); } LOG_DEBUG("restoring CPSR with value 0x%8.8x", cpsr); - arm11_set_reg(&arm11->reg_list[ARM11_RC_CPSR], (u8*)&cpsr); + arm11_set_reg(&arm11->reg_list[ARM11_RC_CPSR], (uint8_t*)&cpsr); // arm11->core_state = core_state; // arm11->core_mode = core_mode; @@ -1535,12 +1540,6 @@ int arm11_target_create(struct target_s *target, Jim_Interp *interp) arm11->target = target; - /* prepare JTAG information for the new target */ - arm11->jtag_info.tap = target->tap; - arm11->jtag_info.scann_size = 5; - - CHECK_RETVAL(arm_jtag_setup_connection(&arm11->jtag_info)); - if (target->tap==NULL) return ERROR_FAIL; @@ -1633,7 +1632,7 @@ int arm11_examine(struct target_s *target) arm11_check_init(arm11, NULL); - target->type->examined = 1; + target_set_examined(target); return ERROR_OK; } @@ -1669,7 +1668,7 @@ int arm11_get_reg(reg_t *reg) } /** Change a value in the register cache */ -int arm11_set_reg(reg_t *reg, u8 *buf) +int arm11_set_reg(reg_t *reg, uint8_t *buf) { FNC_INFO; @@ -1731,7 +1730,7 @@ int arm11_build_reg_cache(target_t *target) r->name = rd->name; r->size = 32; - r->value = (u8 *)(arm11->reg_values + i); + r->value = (uint8_t *)(arm11->reg_values + i); r->dirty = 0; r->valid = 0; r->bitfield_desc = NULL; @@ -1838,7 +1837,7 @@ arm11_common_t * arm11_find_target(const char * arg) jtag_tap_t * tap; target_t * t; - tap = jtag_TapByString(arg); + tap = jtag_tap_by_string(arg); if (!tap) return 0; @@ -1849,7 +1848,7 @@ arm11_common_t * arm11_find_target(const char * arg) continue; /* if (t->type == arm11_target) */ - if (0 == strcmp(t->type->name, "arm11")) + if (0 == strcmp(target_get_name(t), "arm11")) return t->arch_info; } @@ -1956,7 +1955,7 @@ int arm11_register_commands(struct command_context_s *cmd_ctx) RC_FINAL_BOOL( "error_fatal", "Terminate program if transfer error was found (default: enabled)", memwrite_error_fatal) - ) + ) /* memwrite */ RC_FINAL_BOOL( "no_increment", "Don't increment address on multi-read/-write (default: disabled)", memrw_no_increment) @@ -1972,7 +1971,7 @@ int arm11_register_commands(struct command_context_s *cmd_ctx) RC_FINAL( "mcr", "Write Coprocessor register", arm11_handle_mcr) - ) + ) /* arm11 */ return ERROR_OK; }