X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm11.c;h=936edd818fc23a5dc22aa88b0b1ef9181f99bfce;hb=f4788652e45662d1e43933dc0620561bc4cddae0;hp=348dd8755f61c4e2a049a5605f98638a049a68ed;hpb=5d1a9033ab89b017c95e79590d76abbfa61f7512;p=openocd.git diff --git a/src/target/arm11.c b/src/target/arm11.c index 348dd8755f..936edd818f 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -26,12 +26,14 @@ #include "config.h" #endif -#include "arm11.h" +#include "etm.h" +#include "breakpoints.h" #include "arm11_dbgtap.h" -#include "armv4_5.h" #include "arm_simulator.h" #include "time_support.h" #include "target_type.h" +#include "algorithm.h" +#include "register.h" #if 0 @@ -56,8 +58,6 @@ static uint32_t arm11_vcr = 0; static bool arm11_config_step_irq_enable = false; static bool arm11_config_hardware_step = false; -static int arm11_regs_arch_type = -1; - enum arm11_regtype { ARM11_REGISTER_CORE, @@ -261,7 +261,6 @@ static struct reg arm11_gdb_dummy_fp_reg = .valid = 1, .size = 96, .arch_info = NULL, - .arch_type = 0, }; static uint8_t arm11_gdb_dummy_fps_value[4]; @@ -274,7 +273,6 @@ static struct reg arm11_gdb_dummy_fps_reg = .valid = 1, .size = 32, .arch_info = NULL, - .arch_type = 0, }; @@ -360,7 +358,7 @@ static int arm11_on_enter_debug_state(struct arm11_common *arm11) int retval; FNC_INFO; - for (size_t i = 0; i < asizeof(arm11->reg_values); i++) + for (size_t i = 0; i < ARRAY_SIZE(arm11->reg_values); i++) { arm11->reg_list[i].valid = 1; arm11->reg_list[i].dirty = 0; @@ -383,7 +381,7 @@ static int arm11_on_enter_debug_state(struct arm11_common *arm11) arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 1); arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2); - arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE); + arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE); } else { @@ -663,7 +661,7 @@ static int arm11_leave_debug_state(struct arm11_common *arm11) arm11_setup_field(arm11, 1, &Ready, NULL, chain5_fields + 1); arm11_setup_field(arm11, 1, &Valid, NULL, chain5_fields + 2); - arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE); + arm11_add_dr_scan_vc(ARRAY_SIZE(chain5_fields), chain5_fields, TAP_DRPAUSE); } arm11_record_register_history(arm11); @@ -874,7 +872,7 @@ static int arm11_resume(struct target *target, int current, brp[1].address = ARM11_SC7_BCR0 + brp_num; brp[1].value = 0x1 | (3 << 1) | (0x0F << 5) | (0 << 14) | (0 << 16) | (0 << 20) | (0 << 21); - arm11_sc7_run(arm11, brp, asizeof(brp)); + arm11_sc7_run(arm11, brp, ARRAY_SIZE(brp)); LOG_DEBUG("Add BP " ZU " at %08" PRIx32 "", brp_num, bp->address); @@ -1117,7 +1115,7 @@ static int arm11_step(struct target *target, int current, brp[1].value = 0x1 | (3 << 1) | (0x0F << 5) | (0 << 14) | (0 << 16) | (0 << 20) | (0 << 21); } - CHECK_RETVAL(arm11_sc7_run(arm11, brp, asizeof(brp))); + CHECK_RETVAL(arm11_sc7_run(arm11, brp, ARRAY_SIZE(brp))); /* resume */ @@ -1662,13 +1660,13 @@ static int arm11_run_algorithm(struct target *target, if (!reg) { LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name); - exit(-1); + return ERROR_INVALID_ARGUMENTS; } if (reg->size != reg_params[i].size) { LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name); - exit(-1); + return ERROR_INVALID_ARGUMENTS; } arm11_set_reg(reg,reg_params[i].value); // printf("%i: Set %s =%08x\n", i, reg_params[i].reg_name,val); @@ -1747,13 +1745,15 @@ static int arm11_run_algorithm(struct target *target, if (!reg) { LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name); - exit(-1); + retval = ERROR_INVALID_ARGUMENTS; + goto del_breakpoint; } if (reg->size != reg_params[i].size) { LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name); - exit(-1); + retval = ERROR_INVALID_ARGUMENTS; + goto del_breakpoint; } buf_set_u32(reg_params[i].value, 0, 32, buf_get_u32(reg->value, 0, 32)); @@ -1844,7 +1844,7 @@ static int arm11_examine(struct target *target) arm11_setup_field(arm11, 32, NULL, &arm11->didr, chain0_fields + 0); arm11_setup_field(arm11, 8, NULL, &arm11->implementor, chain0_fields + 1); - arm11_add_dr_scan_vc(asizeof(chain0_fields), chain0_fields, TAP_IDLE); + arm11_add_dr_scan_vc(ARRAY_SIZE(chain0_fields), chain0_fields, TAP_IDLE); CHECK_RETVAL(jtag_execute_queue()); @@ -1941,6 +1941,11 @@ static int arm11_set_reg(struct reg *reg, uint8_t *buf) return ERROR_OK; } +static const struct reg_arch_type arm11_reg_type = { + .get = arm11_get_reg, + .set = arm11_set_reg, +}; + static int arm11_build_reg_cache(struct target *target) { struct arm11_common *arm11 = target_to_arm11(target); @@ -1949,9 +1954,6 @@ static int arm11_build_reg_cache(struct target *target) NEW(struct reg, reg_list, ARM11_REGCACHE_COUNT); NEW(struct arm11_reg_state, arm11_reg_states, ARM11_REGCACHE_COUNT); - if (arm11_regs_arch_type == -1) - arm11_regs_arch_type = register_reg_arch_type(arm11_get_reg, arm11_set_reg); - register_init_dummy(&arm11_gdb_dummy_fp_reg); register_init_dummy(&arm11_gdb_dummy_fps_reg); @@ -1972,11 +1974,11 @@ static int arm11_build_reg_cache(struct target *target) size_t i; /* Not very elegant assertion */ - if (ARM11_REGCACHE_COUNT != asizeof(arm11->reg_values) || - ARM11_REGCACHE_COUNT != asizeof(arm11_reg_defs) || + if (ARM11_REGCACHE_COUNT != ARRAY_SIZE(arm11->reg_values) || + ARM11_REGCACHE_COUNT != ARRAY_SIZE(arm11_reg_defs) || ARM11_REGCACHE_COUNT != ARM11_RC_MAX) { - LOG_ERROR("BUG: arm11->reg_values inconsistent (%d " ZU " " ZU " %d)", ARM11_REGCACHE_COUNT, asizeof(arm11->reg_values), asizeof(arm11_reg_defs), ARM11_RC_MAX); + LOG_ERROR("BUG: arm11->reg_values inconsistent (%d " ZU " " ZU " %d)", ARM11_REGCACHE_COUNT, ARRAY_SIZE(arm11->reg_values), ARRAY_SIZE(arm11_reg_defs), ARM11_RC_MAX); exit(-1); } @@ -1991,7 +1993,7 @@ static int arm11_build_reg_cache(struct target *target) r->value = (uint8_t *)(arm11->reg_values + i); r->dirty = 0; r->valid = 0; - r->arch_type = arm11_regs_arch_type; + r->type = &arm11_reg_type; r->arch_info = rs; rs->def_index = i; @@ -2135,6 +2137,8 @@ static int arm11_register_commands(struct command_context *cmd_ctx) struct command *top_cmd, *mw_cmd; + armv4_5_register_commands(cmd_ctx); + top_cmd = register_command(cmd_ctx, NULL, "arm11", NULL, COMMAND_ANY, NULL);