X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm11_dbgtap.c;h=fa127c640b0737622f1e8ac715cab4f4a452c469;hb=0c9a2e99ca27ee4b1c51021c967d0752152982fa;hp=2b684b945715d9c61189fed4d4e7bcb21c90389d;hpb=0d327e9e40022db6b77a4b6f2441a2f06f255d3a;p=openocd.git

diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index 2b684b9457..fa127c640b 100644
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -87,12 +87,6 @@ void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, vo
 {
 	field->tap   			= arm11->jtag_info.tap;
 	field->num_bits			= num_bits;
-	field->out_mask			= NULL;
-	field->in_check_mask	= NULL;
-	field->in_check_value	= NULL;
-	field->in_handler		= NULL;
-	field->in_handler_priv	= NULL;
-
 	field->out_value		= out_data;
 	field->in_value			= in_data;
 }
@@ -131,7 +125,7 @@ void arm11_add_IR(arm11_common_t * arm11, u8 instr, tap_state_t state)
  *  arm11_add_debug_SCAN_N().
  *
  */
-static int arm11_in_handler_SCAN_N(u8 *in_value, void *priv, struct scan_field_s *field)
+static void arm11_in_handler_SCAN_N(u8 *in_value)
 {
 	/** \todo TODO: clarify why this isnt properly masked in jtag.c jtag_read_buffer() */
 	u8 v = *in_value & 0x1F;
@@ -139,11 +133,10 @@ static int arm11_in_handler_SCAN_N(u8 *in_value, void *priv, struct scan_field_s
 	if (v != 0x10)
 	{
 		LOG_ERROR("'arm11 target' JTAG communication error SCREG SCAN OUT 0x%02x (expected 0x10)", v);
-		return ERROR_FAIL;
+		jtag_set_error(ERROR_FAIL);
 	}
 
 	JTAG_DEBUG("SCREG SCAN OUT 0x%02x", v);
-	return ERROR_OK;
 }
 
 /** Select and write to Scan Chain Register (SCREG)
@@ -178,11 +171,14 @@ void arm11_add_debug_SCAN_N(arm11_common_t * arm11, u8 chain, tap_state_t state)
 
 	scan_field_t		field;
 
-	arm11_setup_field(arm11, 5, &chain, NULL, &field);
-
-	field.in_handler = arm11_in_handler_SCAN_N;
+	u8 tmp[1];
+	arm11_setup_field(arm11, 5, &chain, &tmp, &field);
 
 	arm11_add_dr_scan_vc(1, &field, state == ARM11_TAP_DEFAULT ? TAP_DRPAUSE : state);
+
+	jtag_execute_queue_noclear();
+
+	arm11_in_handler_SCAN_N(tmp);
 }
 
 /** Write an instruction into the ITR register
@@ -553,14 +549,13 @@ int arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32 *
 
 	size_t error_count = 0;
 
-	{size_t i;
-	for (i = 0; i < asizeof(Readies); i++)
+	for (size_t i = 0; i < asizeof(Readies); i++)
 	{
 		if (Readies[i] != 1)
 		{
 			error_count++;
 		}
-	}}
+	}
 
 	if (error_count)
 		LOG_ERROR("Transfer errors " ZU, error_count);
@@ -703,8 +698,7 @@ int arm11_sc7_run(arm11_common_t * arm11, arm11_sc7_action_t * actions, size_t c
 	arm11_setup_field(arm11, 32, &DataOut,		&DataIn,	chain7_fields + 1);
 	arm11_setup_field(arm11,  7, &AddressOut,	&AddressIn,	chain7_fields + 2);
 
-	{size_t i;
-	for (i = 0; i < count + 1; i++)
+	for (size_t i = 0; i < count + 1; i++)
 	{
 		if (i < count)
 		{
@@ -750,13 +744,12 @@ int arm11_sc7_run(arm11_common_t * arm11, arm11_sc7_action_t * actions, size_t c
 				}
 			}
 		}
-	}}
+	}
 
-	{size_t i;
-	for (i = 0; i < count; i++)
+	for (size_t i = 0; i < count; i++)
 	{
 		JTAG_DEBUG("SC7 %02d: %02x %s %08x", i, actions[i].address, actions[i].write ? "<=" : "=>", actions[i].value);
-	}}
+	}
 
 	return ERROR_OK;
 }
@@ -771,22 +764,19 @@ void arm11_sc7_clear_vbw(arm11_common_t * arm11)
 	arm11_sc7_action_t		clear_bw[arm11->brp + arm11->wrp + 1];
 	arm11_sc7_action_t *	pos = clear_bw;
 
-	{size_t i;
-	for (i = 0; i < asizeof(clear_bw); i++)
+	for (size_t i = 0; i < asizeof(clear_bw); i++)
 	{
 		clear_bw[i].write	= true;
 		clear_bw[i].value	= 0;
-	}}
+	}
 
-	{size_t i;
-	for (i = 0; i < arm11->brp; i++)
+	for (size_t i = 0; i < arm11->brp; i++)
 		(pos++)->address = ARM11_SC7_BCR0 + i;
-	}
 
-	{size_t i;
-	for (i = 0; i < arm11->wrp; i++)
+
+	for (size_t i = 0; i < arm11->wrp; i++)
 		(pos++)->address = ARM11_SC7_WCR0 + i;
-	}
+
 
 	(pos++)->address = ARM11_SC7_VCR;