X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm720t.c;h=a3c40d6f6a60bd181b6ae7c087b54f2d8cb28243;hb=e8af4de0a7d224e1aa28e72f0de1ddf0bec5beb8;hp=677aa4587719ea0759106c6519a807f58fdbaf4e;hpb=fbf5bec7f3ea9f4a9584099a12e71681cb55ce35;p=openocd.git diff --git a/src/target/arm720t.c b/src/target/arm720t.c index 677aa45877..a3c40d6f6a 100644 --- a/src/target/arm720t.c +++ b/src/target/arm720t.c @@ -28,7 +28,7 @@ #include #include -#if 1 +#if 0 #define _DEBUG_INSTRUCTION_EXECUTION_ #endif @@ -63,6 +63,7 @@ target_type_t arm720t_target = .assert_reset = arm7_9_assert_reset, .deassert_reset = arm7_9_deassert_reset, .soft_reset_halt = arm720t_soft_reset_halt, + .prepare_reset_halt = arm7_9_prepare_reset_halt, .get_gdb_reg_list = armv4_5_get_gdb_reg_list, @@ -92,12 +93,11 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c u8 out_buf[4]; u8 instruction_buf = instruction; - out = flip_u32(out, 32); - buf_set_u32(out_buf, 0, 32, out); + buf_set_u32(out_buf, 0, 32, flip_u32(out, 32)); jtag_add_end_state(TAP_PD); arm_jtag_scann(jtag_info, 0xf); - arm_jtag_set_instr(jtag_info, jtag_info->intest_instr); + arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL); fields[0].device = jtag_info->chain_pos; fields[0].num_bits = 1; @@ -113,21 +113,20 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c fields[1].num_bits = 32; fields[1].out_value = out_buf; fields[1].out_mask = NULL; + fields[1].in_value = NULL; if (in) { - fields[1].in_value = (u8*)in; fields[1].in_handler = arm_jtag_buf_to_u32_flip; fields[1].in_handler_priv = in; } else { - fields[1].in_value = NULL; fields[1].in_handler = NULL; fields[1].in_handler_priv = NULL; } fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; - jtag_add_dr_scan(2, fields, -1); + jtag_add_dr_scan(2, fields, -1, NULL); if (clock) jtag_add_runtest(0, -1); @@ -140,7 +139,7 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c else DEBUG("out: %8.8x, instruction: %i, clock: %i", out, instruction, clock); #else - DEBUG("out: %8.8x, instruction: %i, clock: %i", in, out, instruction, clock); + DEBUG("out: %8.8x, instruction: %i, clock: %i", out, instruction, clock); #endif return ERROR_OK; @@ -373,7 +372,7 @@ int arm720t_soft_reset_halt(struct target_s *target) target->type->halt(target); } - while (buf_get_u32(dbg_stat->value, EICE_DBG_CONTROL_DBGACK, 1) == 0) + while (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0) { embeddedice_read_reg(dbg_stat); jtag_execute_queue();