X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm7tdmi.c;h=ff398887d640a418e895d3c51bf3b2a1f739a49d;hb=e2b6de3d66bae70cb08fea17f5b66ee875dbb636;hp=9a9a2450595ba0a85e87a19e90e81ee8d174e2a5;hpb=e27696f6b04459e935a0a5f65f7f668cb02970dd;p=openocd.git diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c index 9a9a245059..ff398887d6 100644 --- a/src/target/arm7tdmi.c +++ b/src/target/arm7tdmi.c @@ -49,7 +49,7 @@ int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *tar int arm7tdmi_quit(); /* target function declarations */ -enum target_state arm7tdmi_poll(struct target_s *target); +int arm7tdmi_poll(struct target_s *target); int arm7tdmi_halt(target_t *target); target_type_t arm7tdmi_target = @@ -68,7 +68,6 @@ target_type_t arm7tdmi_target = .assert_reset = arm7_9_assert_reset, .deassert_reset = arm7_9_deassert_reset, .soft_reset_halt = arm7_9_soft_reset_halt, - .prepare_reset_halt = arm7_9_prepare_reset_halt, .get_gdb_reg_list = armv4_5_get_gdb_reg_list, @@ -76,6 +75,7 @@ target_type_t arm7tdmi_target = .write_memory = arm7_9_write_memory, .bulk_write_memory = arm7_9_bulk_write_memory, .checksum_memory = arm7_9_checksum_memory, + .blank_check_memory = arm7_9_blank_check_memory, .run_algorithm = armv4_5_run_algorithm, @@ -87,6 +87,7 @@ target_type_t arm7tdmi_target = .register_commands = arm7tdmi_register_commands, .target_command = arm7tdmi_target_command, .init_target = arm7tdmi_init_target, + .examine = arm7tdmi_examine, .quit = arm7tdmi_quit }; @@ -129,7 +130,7 @@ int arm7tdmi_examine_debug_reason(target_t *target) arm_jtag_scann(&arm7_9->jtag_info, 0x1); arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL); - jtag_add_dr_scan(2, fields, TAP_PD, NULL); + jtag_add_dr_scan(2, fields, TAP_PD); jtag_execute_queue(); fields[0].in_value = NULL; @@ -137,7 +138,7 @@ int arm7tdmi_examine_debug_reason(target_t *target) fields[1].in_value = NULL; fields[1].out_value = databus; - jtag_add_dr_scan(2, fields, TAP_PD, NULL); + jtag_add_dr_scan(2, fields, TAP_PD); if (breakpoint & 1) target->debug_reason = DBG_REASON_WATCHPOINT; @@ -148,66 +149,30 @@ int arm7tdmi_examine_debug_reason(target_t *target) return ERROR_OK; } -/* put an instruction in the ARM7TDMI pipeline or write the data bus, and optionally read data */ -int arm7tdmi_clock_out(arm_jtag_t *jtag_info, u32 out, u32 *in, int breakpoint) +static int arm7tdmi_num_bits[]={1, 32}; +static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, u32 out, int breakpoint) { - scan_field_t fields[2]; - u8 out_buf[4]; - u8 breakpoint_buf; - - buf_set_u32(out_buf, 0, 32, flip_u32(out, 32)); - buf_set_u32(&breakpoint_buf, 0, 1, breakpoint); + u32 values[2]={breakpoint, flip_u32(out, 32)}; + + jtag_add_dr_out(jtag_info->chain_pos, + 2, + arm7tdmi_num_bits, + values, + -1); + + jtag_add_runtest(0, -1); + return ERROR_OK; +} + +/* put an instruction in the ARM7TDMI pipeline or write the data bus, and optionally read data */ +static __inline int arm7tdmi_clock_out(arm_jtag_t *jtag_info, u32 out, u32 *deprecated, int breakpoint) +{ jtag_add_end_state(TAP_PD); arm_jtag_scann(jtag_info, 0x1); arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL); - fields[0].device = jtag_info->chain_pos; - fields[0].num_bits = 1; - fields[0].out_value = &breakpoint_buf; - fields[0].out_mask = NULL; - fields[0].in_value = NULL; - fields[0].in_check_value = NULL; - fields[0].in_check_mask = NULL; - fields[0].in_handler = NULL; - fields[0].in_handler_priv = NULL; - - fields[1].device = jtag_info->chain_pos; - fields[1].num_bits = 32; - fields[1].out_value = out_buf; - fields[1].out_mask = NULL; - fields[1].in_value = NULL; - if (in) - { - fields[1].in_handler = arm_jtag_buf_to_u32_flip; - fields[1].in_handler_priv = in; - } - else - { - fields[1].in_handler = NULL; - fields[1].in_handler_priv = NULL; - } - fields[1].in_check_value = NULL; - fields[1].in_check_mask = NULL; - - jtag_add_dr_scan(2, fields, -1, NULL); - - jtag_add_runtest(0, -1); - -#ifdef _DEBUG_INSTRUCTION_EXECUTION_ -{ - jtag_execute_queue(); - - if (in) - { - DEBUG("out: 0x%8.8x, in: 0x%8.8x", out, *in); - } - else - DEBUG("out: 0x%8.8x", out); -} -#endif - - return ERROR_OK; + return arm7tdmi_clock_out_inner(jtag_info, out, breakpoint); } /* clock the target, reading the databus */ @@ -239,7 +204,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in) fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; - jtag_add_dr_scan(2, fields, -1, NULL); + jtag_add_dr_scan(2, fields, -1); jtag_add_runtest(0, -1); @@ -249,11 +214,11 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in) if (in) { - DEBUG("in: 0x%8.8x", *in); + LOG_DEBUG("in: 0x%8.8x", *in); } else { - ERROR("BUG: called with in == NULL"); + LOG_ERROR("BUG: called with in == NULL"); } } #endif @@ -304,7 +269,7 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; - jtag_add_dr_scan(2, fields, -1, NULL); + jtag_add_dr_scan(2, fields, -1); jtag_add_runtest(0, -1); @@ -314,11 +279,11 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, if (in) { - DEBUG("in: 0x%8.8x", *in); + LOG_DEBUG("in: 0x%8.8x", *(u32*)in); } else { - ERROR("BUG: called with in == NULL"); + LOG_ERROR("BUG: called with in == NULL"); } } #endif @@ -476,7 +441,7 @@ void arm7tdmi_write_xpsr(target_t *target, u32 xpsr, int spsr) arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm_jtag_t *jtag_info = &arm7_9->jtag_info; - DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr); + LOG_DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr); /* MSR1 fetched */ arm7tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr & 0xff, 0, 1, spsr), NULL, 0); @@ -507,7 +472,7 @@ void arm7tdmi_write_xpsr_im8(target_t *target, u8 xpsr_im, int rot, int spsr) arm7_9_common_t *arm7_9 = armv4_5->arch_info; arm_jtag_t *jtag_info = &arm7_9->jtag_info; - DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr); + LOG_DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr); /* MSR fetched */ arm7tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr_im, rot, 1, spsr), NULL, 0); @@ -534,17 +499,17 @@ void arm7tdmi_write_core_regs(target_t *target, u32 mask, u32 core_regs[16]) arm7tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, mask & 0xffff, 0, 0), NULL, 0); /* fetch NOP, LDM in DECODE stage */ - arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); + arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0); /* fetch NOP, LDM in EXECUTE stage (1st cycle) */ - arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); + arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0); for (i = 0; i <= 15; i++) { if (mask & (1 << i)) /* nothing fetched, LDM still in EXECUTE (1+i cycle) */ - arm7tdmi_clock_out(jtag_info, core_regs[i], NULL, 0); + arm7tdmi_clock_out_inner(jtag_info, core_regs[i], 0); } - arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); + arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0); } @@ -644,19 +609,19 @@ void arm7tdmi_write_pc(target_t *target, u32 pc) */ arm7tdmi_clock_out(jtag_info, ARMV4_5_LDMIA(0, 0x8000, 0, 0), NULL, 0); /* fetch NOP, LDM in DECODE stage */ - arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); + arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0); /* fetch NOP, LDM in EXECUTE stage (1st cycle) */ - arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); + arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0); /* nothing fetched, LDM in EXECUTE stage (1st cycle) load register */ - arm7tdmi_clock_out(jtag_info, pc, NULL, 0); + arm7tdmi_clock_out_inner(jtag_info, pc, 0); /* nothing fetched, LDM in EXECUTE stage (2nd cycle) load register */ - arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); + arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0); /* nothing fetched, LDM in EXECUTE stage (3rd cycle) load register */ - arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); + arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0); /* fetch NOP, LDM in EXECUTE stage (4th cycle) */ - arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); + arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0); /* fetch NOP, LDM in EXECUTE stage (5th cycle) */ - arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0); + arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0); } void arm7tdmi_branch_resume(target_t *target) @@ -667,13 +632,13 @@ void arm7tdmi_branch_resume(target_t *target) arm_jtag_t *jtag_info = &arm7_9->jtag_info; arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1); - arm7tdmi_clock_out(jtag_info, ARMV4_5_B(0xfffffa, 0), NULL, 0); + arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_B(0xfffffa, 0), 0); } void arm7tdmi_branch_resume_thumb(target_t *target) { - DEBUG("-"); + LOG_DEBUG("-"); /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; @@ -738,20 +703,45 @@ void arm7tdmi_build_reg_cache(target_t *target) reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache); /* get pointers to arch-specific information */ armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; - arm_jtag_t *jtag_info = &arm7_9->jtag_info; (*cache_p) = armv4_5_build_reg_cache(target, armv4_5); armv4_5->core_cache = (*cache_p); - - (*cache_p)->next = embeddedice_build_reg_cache(target, arm7_9); - arm7_9->eice_cache = (*cache_p)->next; - +} + +int arm7tdmi_examine(struct command_context_s *cmd_ctx, struct target_s *target) +{ + int retval; + armv4_5_common_t *armv4_5 = target->arch_info; + arm7_9_common_t *arm7_9 = armv4_5->arch_info; + if (!target->type->examined) + { + /* get pointers to arch-specific information */ + reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache); + reg_cache_t *t=embeddedice_build_reg_cache(target, arm7_9); + if (t==NULL) + return ERROR_FAIL; + + (*cache_p) = t; + arm7_9->eice_cache = (*cache_p); + + if (arm7_9->etm_ctx) + { + arm_jtag_t *jtag_info = &arm7_9->jtag_info; + (*cache_p)->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx); + arm7_9->etm_ctx->reg_cache = (*cache_p)->next; + } + target->type->examined = 1; + } + if ((retval=embeddedice_setup(target))!=ERROR_OK) + return retval; + if ((retval=arm7_9_setup(target))!=ERROR_OK) + return retval; if (arm7_9->etm_ctx) { - (*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx); - arm7_9->etm_ctx->reg_cache = (*cache_p)->next->next; + if ((retval=etm_setup(target))!=ERROR_OK) + return retval; } + return ERROR_OK; } int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target) @@ -845,10 +835,11 @@ int arm7tdmi_target_command(struct command_context_s *cmd_ctx, char *cmd, char * int chain_pos; char *variant = NULL; arm7tdmi_common_t *arm7tdmi = malloc(sizeof(arm7tdmi_common_t)); + memset(arm7tdmi, 0, sizeof(*arm7tdmi)); if (argc < 4) { - ERROR("'target arm7tdmi' requires at least one additional argument"); + LOG_ERROR("'target arm7tdmi' requires at least one additional argument"); exit(-1); }