X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm920t.c;h=055e46f8fdc62e79111757431d4be8102a18de51;hb=3a550e5b5fe011e526b150a5d234b48e8e2aaad6;hp=7627b25e84e784104fdbb88f3ff577a84aa71a5c;hpb=44ef0327dd97c1893afc63cd7fd8025cb1b57827;p=openocd.git diff --git a/src/target/arm920t.c b/src/target/arm920t.c index 7627b25e84..055e46f8fd 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -89,11 +89,16 @@ static int arm920t_read_cp15_physical(struct target *target, uint8_t access_type_buf = 1; uint8_t reg_addr_buf = reg_addr & 0x3f; uint8_t nr_w_buf = 0; + int retval; jtag_info = &arm920t->arm7_9_common.jtag_info; - arm_jtag_scann(jtag_info, 0xf, TAP_IDLE); - arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE); + retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE); + if (retval != ERROR_OK) + return retval; + retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE); + if (retval != ERROR_OK) + return retval; fields[0].num_bits = 1; fields[0].out_value = &access_type_buf; @@ -137,13 +142,18 @@ static int arm920t_write_cp15_physical(struct target *target, uint8_t reg_addr_buf = reg_addr & 0x3f; uint8_t nr_w_buf = 1; uint8_t value_buf[4]; + int retval; jtag_info = &arm920t->arm7_9_common.jtag_info; buf_set_u32(value_buf, 0, 32, value); - arm_jtag_scann(jtag_info, 0xf, TAP_IDLE); - arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE); + retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE); + if (retval != ERROR_OK) + return retval; + retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE); + if (retval != ERROR_OK) + return retval; fields[0].num_bits = 1; fields[0].out_value = &access_type_buf; @@ -191,8 +201,12 @@ static int arm920t_execute_cp15(struct target *target, uint32_t cp15_opcode, jtag_info = &arm920t->arm7_9_common.jtag_info; - arm_jtag_scann(jtag_info, 0xf, TAP_IDLE); - arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE); + retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE); + if (retval != ERROR_OK) + return retval; + retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE); + if (retval != ERROR_OK) + return retval; buf_set_u32(cp15_opcode_buf, 0, 32, cp15_opcode); @@ -232,11 +246,11 @@ static int arm920t_execute_cp15(struct target *target, uint32_t cp15_opcode, static int arm920t_read_cp15_interpreted(struct target *target, uint32_t cp15_opcode, uint32_t address, uint32_t *value) { - struct arm *armv4_5 = target_to_arm(target); + struct arm *arm = target_to_arm(target); uint32_t* regs_p[1]; uint32_t regs[2]; uint32_t cp15c15 = 0x0; - struct reg *r = armv4_5->core_cache->reg_list; + struct reg *r = arm->core_cache->reg_list; /* load address into R1 */ regs[1] = address; @@ -266,8 +280,11 @@ static int arm920t_read_cp15_interpreted(struct target *target, cp15_opcode, address, *value); #endif - if (!is_arm_mode(armv4_5->core_mode)) + if (!is_arm_mode(arm->core_mode)) + { + LOG_ERROR("not a valid arm core mode - communication failure?"); return ERROR_FAIL; + } r[0].dirty = 1; r[1].dirty = 1; @@ -280,9 +297,9 @@ int arm920t_write_cp15_interpreted(struct target *target, uint32_t cp15_opcode, uint32_t value, uint32_t address) { uint32_t cp15c15 = 0x0; - struct arm *armv4_5 = target_to_arm(target); + struct arm *arm = target_to_arm(target); uint32_t regs[2]; - struct reg *r = armv4_5->core_cache->reg_list; + struct reg *r = arm->core_cache->reg_list; /* load value, address into R0, R1 */ regs[0] = value; @@ -308,8 +325,11 @@ int arm920t_write_cp15_interpreted(struct target *target, cp15_opcode, value, address); #endif - if (!is_arm_mode(armv4_5->core_mode)) + if (!is_arm_mode(arm->core_mode)) + { + LOG_ERROR("not a valid arm core mode - communication failure?"); return ERROR_FAIL; + } r[0].dirty = 1; r[1].dirty = 1; @@ -513,7 +533,6 @@ int arm920t_arch_state(struct target *target) }; struct arm920t_common *arm920t = target_to_arm920(target); - struct arm *armv4_5; if (arm920t->common_magic != ARM920T_COMMON_MAGIC) { @@ -521,8 +540,6 @@ int arm920t_arch_state(struct target *target) return ERROR_TARGET_INVALID; } - armv4_5 = &arm920t->arm7_9_common.armv4_5_common; - arm_arch_state(target); LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s", state[arm920t->armv4_5_mmu.mmu_enabled], @@ -582,7 +599,7 @@ static int arm920t_read_phys_memory(struct target *target, static int arm920t_write_phys_memory(struct target *target, uint32_t address, uint32_t size, - uint32_t count, uint8_t *buffer) + uint32_t count, const uint8_t *buffer) { struct arm920t_common *arm920t = target_to_arm920(target); @@ -593,7 +610,7 @@ static int arm920t_write_phys_memory(struct target *target, /** Writes a buffer, in the specified word size, with current MMU settings. */ int arm920t_write_memory(struct target *target, uint32_t address, - uint32_t size, uint32_t count, uint8_t *buffer) + uint32_t size, uint32_t count, const uint8_t *buffer) { int retval; const uint32_t cache_mask = ~0x1f; /* cache line size : 32 byte */ @@ -746,7 +763,7 @@ int arm920t_soft_reset_halt(struct target *target) int retval = ERROR_OK; struct arm920t_common *arm920t = target_to_arm920(target); struct arm7_9_common *arm7_9 = target_to_arm7_9(target); - struct arm *armv4_5 = &arm7_9->armv4_5_common; + struct arm *arm = &arm7_9->arm; struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; if ((retval = target_halt(target)) != ERROR_OK) @@ -790,16 +807,16 @@ int arm920t_soft_reset_halt(struct target *target) /* SVC, ARM state, IRQ and FIQ disabled */ uint32_t cpsr; - cpsr = buf_get_u32(armv4_5->cpsr->value, 0, 32); + cpsr = buf_get_u32(arm->cpsr->value, 0, 32); cpsr &= ~0xff; cpsr |= 0xd3; - arm_set_cpsr(armv4_5, cpsr); - armv4_5->cpsr->dirty = 1; + arm_set_cpsr(arm, cpsr); + arm->cpsr->dirty = 1; /* start fetching from 0x0 */ - buf_set_u32(armv4_5->pc->value, 0, 32, 0x0); - armv4_5->pc->dirty = 1; - armv4_5->pc->valid = 1; + buf_set_u32(arm->pc->value, 0, 32, 0x0); + arm->pc->dirty = 1; + arm->pc->valid = 1; arm920t_disable_mmu_caches(target, 1, 1, 1); arm920t->armv4_5_mmu.mmu_enabled = 0; @@ -824,8 +841,8 @@ static int arm920t_init_arch_info(struct target *target, { struct arm7_9_common *arm7_9 = &arm920t->arm7_9_common; - arm7_9->armv4_5_common.mrc = arm920t_mrc; - arm7_9->armv4_5_common.mcr = arm920t_mcr; + arm7_9->arm.mrc = arm920t_mrc; + arm7_9->arm.mcr = arm920t_mcr; /* initialize arm7/arm9 specific info (including armv4_5) */ arm9tdmi_init_arch_info(target, arm7_9, tap); @@ -870,7 +887,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) struct target *target = get_current_target(CMD_CTX); struct arm920t_common *arm920t = target_to_arm920(target); struct arm7_9_common *arm7_9 = target_to_arm7_9(target); - struct arm *armv4_5 = &arm7_9->armv4_5_common; + struct arm *arm = &arm7_9->arm; uint32_t cp15c15; uint32_t cp15_ctrl, cp15_ctrl_saved; uint32_t regs[16]; @@ -878,7 +895,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) uint32_t C15_C_D_Ind, C15_C_I_Ind; int i; FILE *output; - struct arm920t_cache_line d_cache[8][64], i_cache[8][64]; int segment, index_t; struct reg *r; @@ -888,8 +904,7 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) if (CMD_ARGC != 1) { - command_print(CMD_CTX, "usage: arm920t read_cache "); - return ERROR_OK; + return ERROR_COMMAND_SYNTAX_ERROR; } if ((output = fopen(CMD_ARGV[0], "w")) == NULL) @@ -987,8 +1002,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) return retval; } - d_cache[segment][index_t].cam = regs[9]; - /* mask LFSR[6] */ regs[9] &= 0xfffffffe; fprintf(output, "\nsegment: %i, index: %i, CAM: 0x%8.8" @@ -998,7 +1011,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) for (i = 1; i < 9; i++) { - d_cache[segment][index_t].data[i] = regs[i]; fprintf(output, "%i: 0x%8.8" PRIx32 "\n", i-1, regs[i]); } @@ -1095,8 +1107,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) return retval; } - i_cache[segment][index_t].cam = regs[9]; - /* mask LFSR[6] */ regs[9] &= 0xfffffffe; fprintf(output, "\nsegment: %i, index: %i, " @@ -1106,7 +1116,6 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) for (i = 1; i < 9; i++) { - i_cache[segment][index_t].data[i] = regs[i]; fprintf(output, "%i: 0x%8.8" PRIx32 "\n", i-1, regs[i]); } @@ -1139,11 +1148,14 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) fclose(output); - if (!is_arm_mode(armv4_5->core_mode)) + if (!is_arm_mode(arm->core_mode)) + { + LOG_ERROR("not a valid arm core mode - communication failure?"); return ERROR_FAIL; + } /* force writeback of the valid data */ - r = armv4_5->core_cache->reg_list; + r = arm->core_cache->reg_list; r[0].dirty = r[0].valid; r[1].dirty = r[1].valid; r[2].dirty = r[2].valid; @@ -1153,10 +1165,10 @@ COMMAND_HANDLER(arm920t_handle_read_cache_command) r[6].dirty = r[6].valid; r[7].dirty = r[7].valid; - r = arm_reg_current(armv4_5, 8); + r = arm_reg_current(arm, 8); r->dirty = r->valid; - r = arm_reg_current(armv4_5, 9); + r = arm_reg_current(arm, 9); r->dirty = r->valid; return ERROR_OK; @@ -1168,7 +1180,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) struct target *target = get_current_target(CMD_CTX); struct arm920t_common *arm920t = target_to_arm920(target); struct arm7_9_common *arm7_9 = target_to_arm7_9(target); - struct arm *armv4_5 = &arm7_9->armv4_5_common; + struct arm *arm = &arm7_9->arm; uint32_t cp15c15; uint32_t cp15_ctrl, cp15_ctrl_saved; uint32_t regs[16]; @@ -1186,8 +1198,7 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) if (CMD_ARGC != 1) { - command_print(CMD_CTX, "usage: arm920t read_mmu "); - return ERROR_OK; + return ERROR_COMMAND_SYNTAX_ERROR; } if ((output = fopen(CMD_ARGV[0], "w")) == NULL) @@ -1466,11 +1477,14 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) fclose(output); - if (!is_arm_mode(armv4_5->core_mode)) + if (!is_arm_mode(arm->core_mode)) + { + LOG_ERROR("not a valid arm core mode - communication failure?"); return ERROR_FAIL; + } /* force writeback of the valid data */ - r = armv4_5->core_cache->reg_list; + r = arm->core_cache->reg_list; r[0].dirty = r[0].valid; r[1].dirty = r[1].valid; r[2].dirty = r[2].valid; @@ -1480,10 +1494,10 @@ COMMAND_HANDLER(arm920t_handle_read_mmu_command) r[6].dirty = r[6].valid; r[7].dirty = r[7].valid; - r = arm_reg_current(armv4_5, 8); + r = arm_reg_current(arm, 8); r->dirty = r->valid; - r = arm_reg_current(armv4_5, 9); + r = arm_reg_current(arm, 9); r->dirty = r->valid; return ERROR_OK; @@ -1634,8 +1648,7 @@ COMMAND_HANDLER(arm920t_handle_cp15i_command) } else { - command_print(CMD_CTX, - "usage: arm920t cp15i [value] [address]"); + return ERROR_COMMAND_SYNTAX_ERROR; } return ERROR_OK; @@ -1711,6 +1724,7 @@ static const struct command_registration arm920t_exec_command_handlers[] = { .name = "cache_info", .handler = arm920t_handle_cache_info_command, .mode = COMMAND_EXEC, + .usage = "", .help = "display information about target caches", }, { @@ -1737,6 +1751,7 @@ const struct command_registration arm920t_command_handlers[] = { .name = "arm920t", .mode = COMMAND_ANY, .help = "arm920t command group", + .usage = "", .chain = arm920t_exec_command_handlers, }, COMMAND_REGISTRATION_DONE