X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm920t.c;h=3a3c2f1f1369ce0387a5fb0a003cda576506e75b;hb=e2b6de3d66bae70cb08fea17f5b66ee875dbb636;hp=93ddb4cafd4c1bd1541ee694cf2c0d96ad2e989e;hpb=0d7d64b5e9a463f63deb19f00efa14e6e5b1c34e;p=openocd.git diff --git a/src/target/arm920t.c b/src/target/arm920t.c index 93ddb4cafd..3a3c2f1f13 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -79,6 +79,7 @@ target_type_t arm920t_target = .write_memory = arm920t_write_memory, .bulk_write_memory = arm7_9_bulk_write_memory, .checksum_memory = arm7_9_checksum_memory, + .blank_check_memory = arm7_9_blank_check_memory, .run_algorithm = armv4_5_run_algorithm, @@ -335,6 +336,9 @@ int arm920t_read_cp15_interpreted(target_t *target, u32 cp15_opcode, u32 address LOG_DEBUG("cp15_opcode: %8.8x, address: %8.8x, value: %8.8x", cp15_opcode, address, *value); #endif + if (armv4_5_mode_to_number(armv4_5->core_mode)==-1) + return ERROR_FAIL; + ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = 1; ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).dirty = 1; @@ -370,6 +374,9 @@ int arm920t_write_cp15_interpreted(target_t *target, u32 cp15_opcode, u32 value, LOG_DEBUG("cp15_opcode: %8.8x, value: %8.8x, address: %8.8x", cp15_opcode, value, address); #endif + if (armv4_5_mode_to_number(armv4_5->core_mode)==-1) + return ERROR_FAIL; + ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = 1; ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).dirty = 1; @@ -624,7 +631,7 @@ int arm920t_soft_reset_halt(struct target_s *target) reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; int i; - target->type->halt(target); + target_halt(target); for (i=0; i<10; i++) { @@ -1000,6 +1007,9 @@ int arm920t_handle_read_cache_command(struct command_context_s *cmd_ctx, char *c fclose(output); + if (armv4_5_mode_to_number(armv4_5->core_mode)==-1) + return ERROR_FAIL; + /* mark registers dirty. */ ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).valid; ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).valid; @@ -1261,6 +1271,9 @@ int arm920t_handle_read_mmu_command(struct command_context_s *cmd_ctx, char *cmd fclose(output); + if (armv4_5_mode_to_number(armv4_5->core_mode)==-1) + return ERROR_FAIL; + /* mark registers dirty */ ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 0).valid; ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 1).valid;