X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm926ejs.c;h=3c80802145890525f6e7aeea9e09d3fe2d2bf6e4;hb=7280a52e6964d7e5c700670a7ff25cfd8a9d6316;hp=5ffdeaff8bed99bd5cef5f69ab4ae37337cff3c4;hpb=4ce93ac479c29210c4b472a16733bed2537c35f9;p=openocd.git

diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index 5ffdeaff8b..3c80802145 100644
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -159,8 +159,9 @@ int arm926ejs_cp15_read(target_t *target, uint32_t op1, uint32_t op2, uint32_t C
 
 	jtag_add_dr_scan(4, fields, jtag_get_end_state());
 
-	/*TODO: add timeout*/
-	do
+	long long then = timeval_ms();
+
+	for (;;)
 	{
 		/* rescan with NOP, to wait for the access to complete */
 		access = 0;
@@ -173,7 +174,19 @@ int arm926ejs_cp15_read(target_t *target, uint32_t op1, uint32_t op2, uint32_t C
 		{
 			return retval;
 		}
-	} while (buf_get_u32(&access, 0, 1) != 1);
+
+		if (buf_get_u32(&access, 0, 1) == 1)
+		{
+			break;
+		}
+
+		/* 10ms timeout */
+		if ((timeval_ms()-then)>10)
+		{
+			LOG_ERROR("cp15 read operation timed out");
+			return ERROR_FAIL;
+		}
+	}
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 	LOG_DEBUG("addr: 0x%x value: %8.8x", address, *value);
@@ -228,8 +241,10 @@ int arm926ejs_cp15_write(target_t *target, uint32_t op1, uint32_t op2, uint32_t
 	fields[3].in_value = NULL;
 
 	jtag_add_dr_scan(4, fields, jtag_get_end_state());
-	/*TODO: add timeout*/
-	do
+
+	long long then = timeval_ms();
+
+	for (;;)
 	{
 		/* rescan with NOP, to wait for the access to complete */
 		access = 0;
@@ -239,7 +254,19 @@ int arm926ejs_cp15_write(target_t *target, uint32_t op1, uint32_t op2, uint32_t
 		{
 			return retval;
 		}
-	} while (buf_get_u32(&access, 0, 1) != 1);
+
+		if (buf_get_u32(&access, 0, 1) == 1)
+		{
+			break;
+		}
+
+		/* 10ms timeout */
+		if ((timeval_ms()-then)>10)
+		{
+			LOG_ERROR("cp15 write operation timed out");
+			return ERROR_FAIL;
+		}
+	}
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 	LOG_DEBUG("addr: 0x%x value: %8.8x", address, value);
@@ -250,7 +277,7 @@ int arm926ejs_cp15_write(target_t *target, uint32_t op1, uint32_t op2, uint32_t
 	return ERROR_OK;
 }
 
-int arm926ejs_examine_debug_reason(target_t *target)
+static int arm926ejs_examine_debug_reason(target_t *target)
 {
 	armv4_5_common_t *armv4_5 = target->arch_info;
 	arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -262,10 +289,16 @@ int arm926ejs_examine_debug_reason(target_t *target)
 	if ((retval = jtag_execute_queue()) != ERROR_OK)
 		return retval;
 
+	/* Method-Of-Entry (MOE) field */
 	debug_reason = buf_get_u32(dbg_stat->value, 6, 4);
 
 	switch (debug_reason)
 	{
+		case 0:
+			LOG_DEBUG("no *NEW* debug entry (?missed one?)");
+			/* ... since last restart or debug reset ... */
+			target->debug_reason = DBG_REASON_DBGRQ;
+			break;
 		case 1:
 			LOG_DEBUG("breakpoint from EICE unit 0");
 			target->debug_reason = DBG_REASON_BREAKPOINT;
@@ -307,7 +340,21 @@ int arm926ejs_examine_debug_reason(target_t *target)
 			target->debug_reason = DBG_REASON_DBGRQ;
 			break;
 		case 11:
-			LOG_ERROR("BUG: debug re-entry from system speed access shouldn't be handled here");
+			LOG_DEBUG("debug re-entry from system speed access");
+			/* This is normal when connecting to something that's
+			 * already halted, or in some related code paths, but
+			 * otherwise is surprising (and presumably wrong).
+			 */
+			switch (target->debug_reason) {
+			case DBG_REASON_DBGRQ:
+				break;
+			default:
+				LOG_ERROR("unexpected -- debug re-entry");
+				/* FALLTHROUGH */
+			case DBG_REASON_UNDEFINED:
+				target->debug_reason = DBG_REASON_DBGRQ;
+				break;
+			}
 			break;
 		case 12:
 			/* FIX!!!! here be dragons!!! We need to fail here so
@@ -317,20 +364,21 @@ int arm926ejs_examine_debug_reason(target_t *target)
 			 * openocd development mailing list if you have hardware
 			 * to donate to look into this problem....
 			 */
-			LOG_ERROR("mystery debug reason MOE=0xc. Try issuing a resume + halt.");
+			LOG_WARNING("WARNING: mystery debug reason MOE = 0xc. Try issuing a resume + halt.");
 			target->debug_reason = DBG_REASON_DBGRQ;
-			retval = ERROR_TARGET_FAILURE;
 			break;
 		default:
-			LOG_ERROR("BUG: unknown debug reason: 0x%x", debug_reason);
+			LOG_WARNING("WARNING: unknown debug reason: 0x%x", debug_reason);
+			/* Oh agony! should we interpret this as a halt request or
+			 * that the target stopped on it's own accord?
+			 */
 			target->debug_reason = DBG_REASON_DBGRQ;
 			/* if we fail here, we won't talk to the target and it will
 			 * be reported to be in the halted state */
-			retval = ERROR_TARGET_FAILURE;
 			break;
 	}
 
-	return retval;
+	return ERROR_OK;
 }
 
 uint32_t arm926ejs_get_ttb(target_t *target)
@@ -547,7 +595,7 @@ int arm926ejs_arch_state(struct target_s *target)
 			"cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
 			"MMU: %s, D-Cache: %s, I-Cache: %s",
 			 armv4_5_state_strings[armv4_5->core_state],
-			 Jim_Nvp_value2name_simple( nvp_target_debug_reason,target->debug_reason)->name,
+			 Jim_Nvp_value2name_simple(nvp_target_debug_reason,target->debug_reason)->name,
 			 armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)],
 			 buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32),
 			 buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
@@ -572,9 +620,9 @@ int arm926ejs_soft_reset_halt(struct target_s *target)
 		return retval;
 	}
 
-	long long then=timeval_ms();
+	long long then = timeval_ms();
 	int timeout;
-	while (!(timeout=((timeval_ms()-then)>1000)))
+	while (!(timeout = ((timeval_ms()-then) > 1000)))
 	{
 		if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0)
 		{