X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm926ejs.c;h=dd1d36561defcc2909c148954985ed0f3dfae40b;hb=9e62f86f24dbd1a3f8d1a84fbfd18dc15dc23002;hp=e099919b52c5855fca99322b7ae3d2aace7593da;hpb=12c143d5948355b3b54c9c0decc779177b22d5d9;p=openocd.git

diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index e099919b52..dd1d36561d 100644
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -63,35 +63,29 @@ static int arm926ejs_cp15_read(struct target *target, uint32_t op1, uint32_t op2
 
 	buf_set_u32(address_buf, 0, 14, address);
 
-	jtag_set_end_state(TAP_IDLE);
-	if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
+	if ((retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE)) != ERROR_OK)
 	{
 		return retval;
 	}
-	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
 
-	fields[0].tap = jtag_info->tap;
 	fields[0].num_bits = 32;
 	fields[0].out_value = NULL;
 	fields[0].in_value = (uint8_t *)value;
 
-
-	fields[1].tap = jtag_info->tap;
 	fields[1].num_bits = 1;
 	fields[1].out_value = &access;
 	fields[1].in_value = &access;
 
-	fields[2].tap = jtag_info->tap;
 	fields[2].num_bits = 14;
 	fields[2].out_value = address_buf;
 	fields[2].in_value = NULL;
 
-	fields[3].tap = jtag_info->tap;
 	fields[3].num_bits = 1;
 	fields[3].out_value = &nr_w_buf;
 	fields[3].in_value = NULL;
 
-	jtag_add_dr_scan(4, fields, jtag_get_end_state());
+	jtag_add_dr_scan(jtag_info->tap, 4, fields, TAP_IDLE);
 
 	long long then = timeval_ms();
 
@@ -100,7 +94,7 @@ static int arm926ejs_cp15_read(struct target *target, uint32_t op1, uint32_t op2
 		/* rescan with NOP, to wait for the access to complete */
 		access = 0;
 		nr_w_buf = 0;
-		jtag_add_dr_scan(4, fields, jtag_get_end_state());
+		jtag_add_dr_scan(jtag_info->tap, 4, fields, TAP_IDLE);
 
 		jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
 
@@ -126,7 +120,7 @@ static int arm926ejs_cp15_read(struct target *target, uint32_t op1, uint32_t op2
 	LOG_DEBUG("addr: 0x%x value: %8.8x", address, *value);
 #endif
 
-	arm_jtag_set_instr(jtag_info, 0xc, NULL);
+	arm_jtag_set_instr(jtag_info, 0xc, NULL, TAP_IDLE);
 
 	return ERROR_OK;
 }
@@ -157,34 +151,29 @@ static int arm926ejs_cp15_write(struct target *target, uint32_t op1, uint32_t op
 	buf_set_u32(address_buf, 0, 14, address);
 	buf_set_u32(value_buf, 0, 32, value);
 
-	jtag_set_end_state(TAP_IDLE);
-	if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
+	if ((retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE)) != ERROR_OK)
 	{
 		return retval;
 	}
-	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
+	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE);
 
-	fields[0].tap = jtag_info->tap;
 	fields[0].num_bits = 32;
 	fields[0].out_value = value_buf;
 	fields[0].in_value = NULL;
 
-	fields[1].tap = jtag_info->tap;
 	fields[1].num_bits = 1;
 	fields[1].out_value = &access;
 	fields[1].in_value = &access;
 
-	fields[2].tap = jtag_info->tap;
 	fields[2].num_bits = 14;
 	fields[2].out_value = address_buf;
 	fields[2].in_value = NULL;
 
-	fields[3].tap = jtag_info->tap;
 	fields[3].num_bits = 1;
 	fields[3].out_value = &nr_w_buf;
 	fields[3].in_value = NULL;
 
-	jtag_add_dr_scan(4, fields, jtag_get_end_state());
+	jtag_add_dr_scan(jtag_info->tap, 4, fields, TAP_IDLE);
 
 	long long then = timeval_ms();
 
@@ -193,7 +182,7 @@ static int arm926ejs_cp15_write(struct target *target, uint32_t op1, uint32_t op
 		/* rescan with NOP, to wait for the access to complete */
 		access = 0;
 		nr_w_buf = 0;
-		jtag_add_dr_scan(4, fields, jtag_get_end_state());
+		jtag_add_dr_scan(jtag_info->tap, 4, fields, TAP_IDLE);
 		if ((retval = jtag_execute_queue()) != ERROR_OK)
 		{
 			return retval;
@@ -216,7 +205,7 @@ static int arm926ejs_cp15_write(struct target *target, uint32_t op1, uint32_t op
 	LOG_DEBUG("addr: 0x%x value: %8.8x", address, value);
 #endif
 
-	arm_jtag_set_instr(jtag_info, 0xf, NULL);
+	arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
 
 	return ERROR_OK;
 }
@@ -569,9 +558,9 @@ int arm926ejs_soft_reset_halt(struct target *target)
 	armv4_5->cpsr->dirty = 1;
 
 	/* start fetching from 0x0 */
-	buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, 0x0);
-	armv4_5->core_cache->reg_list[15].dirty = 1;
-	armv4_5->core_cache->reg_list[15].valid = 1;
+	buf_set_u32(armv4_5->pc->value, 0, 32, 0x0);
+	armv4_5->pc->dirty = 1;
+	armv4_5->pc->valid = 1;
 
 	arm926ejs_disable_mmu_caches(target, 1, 1, 1);
 	arm926ejs->armv4_5_mmu.mmu_enabled = 0;
@@ -590,7 +579,12 @@ int arm926ejs_write_memory(struct target *target, uint32_t address,
 
 	/* FIX!!!! this should be cleaned up and made much more general. The
 	 * plan is to write up and test on arm926ejs specifically and
-	 * then generalize and clean up afterwards. */
+	 * then generalize and clean up afterwards.
+	 *
+	 *
+	 * Also it should be moved to the callbacks that handle breakpoints
+	 * specifically and not the generic memory write fn's. See XScale code.
+	 **/
 	if (arm926ejs->armv4_5_mmu.mmu_enabled && (count == 1) && ((size==2) || (size==4)))
 	{
 		/* special case the handling of single word writes to bypass MMU
@@ -726,17 +720,16 @@ COMMAND_HANDLER(arm926ejs_handle_cache_info_command)
 
 static int arm926ejs_virt2phys(struct target *target, uint32_t virtual, uint32_t *physical)
 {
-	int type;
 	uint32_t cb;
 	int domain;
 	uint32_t ap;
 	struct arm926ejs_common *arm926ejs = target_to_arm926(target);
 
-	uint32_t ret = armv4_5_mmu_translate_va(target, &arm926ejs->armv4_5_mmu, virtual, &type, &cb, &domain, &ap);
-	if (type == -1)
-	{
-		return ret;
-	}
+	uint32_t ret;
+	int retval = armv4_5_mmu_translate_va(target, &arm926ejs->armv4_5_mmu,
+			virtual, &cb, &domain, &ap, &ret);
+	if (retval != ERROR_OK)
+		return retval;
 	*physical = ret;
 	return ERROR_OK;
 }
@@ -815,6 +808,7 @@ struct target_type arm926ejs_target =
 	.target_create = arm926ejs_target_create,
 	.init_target = arm9tdmi_init_target,
 	.examine = arm7_9_examine,
+	.check_reset = arm7_9_check_reset,
 	.virt2phys = arm926ejs_virt2phys,
 	.mmu = arm926ejs_mmu,