X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm9tdmi.c;h=0778c4b7ffb94c19651ad8011d9756dec37859e6;hb=bc67c6720b246652bc0915b1b6d036ada6c85fda;hp=d21dff739f679b784fee210f4d9ed2702799203e;hpb=04dc98916d9acb57e0f5595534151a24ba4dc684;p=openocd.git

diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index d21dff739f..0778c4b7ff 100644
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -57,6 +57,8 @@ target_type_t arm9tdmi_target =
 	.poll = arm7_9_poll,
 	.arch_state = armv4_5_arch_state,
 
+	.target_request_data = arm7_9_target_request_data,
+
 	.halt = arm7_9_halt,
 	.resume = arm7_9_resume,
 	.step = arm7_9_step,
@@ -71,7 +73,8 @@ target_type_t arm9tdmi_target =
 	.read_memory = arm7_9_read_memory,
 	.write_memory = arm7_9_write_memory,
 	.bulk_write_memory = arm7_9_bulk_write_memory,
-
+	.checksum_memory = arm7_9_checksum_memory,
+	
 	.run_algorithm = armv4_5_run_algorithm,
 	
 	.add_breakpoint = arm7_9_add_breakpoint,
@@ -146,7 +149,7 @@ int arm9tdmi_examine_debug_reason(target_t *target)
 		fields[2].in_handler_priv = NULL;
 		
 		arm_jtag_scann(&arm7_9->jtag_info, 0x1);
-		arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr);
+		arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
 
 		jtag_add_dr_scan(3, fields, TAP_PD);
 		jtag_execute_queue();
@@ -190,7 +193,8 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
 	
 	jtag_add_end_state(TAP_PD);
 	arm_jtag_scann(jtag_info, 0x1);
-	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+	
+	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 		
 	fields[0].device = jtag_info->chain_pos;
 	fields[0].num_bits = 32;
@@ -257,7 +261,8 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 
 	jtag_add_end_state(TAP_PD);
 	arm_jtag_scann(jtag_info, 0x1);
-	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+	
+	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 		
 	fields[0].device = jtag_info->chain_pos;
 	fields[0].num_bits = 32;
@@ -318,10 +323,11 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be)
 {
 	scan_field_t fields[3];
-
+	
 	jtag_add_end_state(TAP_PD);
 	arm_jtag_scann(jtag_info, 0x1);
-	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr);
+	
+	arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
 		
 	fields[0].device = jtag_info->chain_pos;
 	fields[0].num_bits = 32;
@@ -847,16 +853,10 @@ void arm9tdmi_build_reg_cache(target_t *target)
 	(*cache_p)->next = embeddedice_build_reg_cache(target, arm7_9);
 	arm7_9->eice_cache = (*cache_p)->next;
 
-	if (arm7_9->has_etm)
-	{
-		(*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, 0);
-		arm7_9->etm_cache = (*cache_p)->next->next;
-	}
-	
-	if (arm7_9->etb)
+	if (arm7_9->etm_ctx)
 	{
-		(*cache_p)->next->next->next = etb_build_reg_cache(arm7_9->etb);
-		arm7_9->etb->reg_cache = (*cache_p)->next->next->next;
+		(*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
+		arm7_9->etm_ctx->reg_cache = (*cache_p)->next->next;
 	}
 }
 
@@ -920,8 +920,8 @@ int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, int c
 	arm7_9->post_restore_context = NULL;
 
 	/* initialize arch-specific breakpoint handling */
-	buf_set_u32((u8*)(&arm7_9->arm_bkpt), 0, 32, 0xdeeedeee);
-	buf_set_u32((u8*)(&arm7_9->thumb_bkpt), 0, 16, 0xdeee);
+	arm7_9->arm_bkpt = 0xdeeedeee;
+	arm7_9->thumb_bkpt = 0xdeee;
 	
 	arm7_9->sw_bkpts_use_wp = 1;
 	arm7_9->sw_bkpts_enabled = 0;
@@ -988,6 +988,7 @@ int arm9tdmi_target_command(struct command_context_s *cmd_ctx, char *cmd, char *
 	int chain_pos;
 	char *variant = NULL;
 	arm9tdmi_common_t *arm9tdmi = malloc(sizeof(arm9tdmi_common_t));
+	memset(arm9tdmi, 0, sizeof(*arm9tdmi));
 
 	if (argc < 4)
 	{