X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm9tdmi.c;h=58b8efd001642bc07ee37a21fc3a8f5502186887;hb=5eb638c71e95048b090b8a19640d7d4902c07902;hp=e3c6ca352e1645a5f0b32ccacd14325f10ea5f6d;hpb=19b84dafb0a9902df78aa021330cbcfae93a89a7;p=openocd.git diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index e3c6ca352e..58b8efd001 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -45,50 +45,7 @@ #define _DEBUG_INSTRUCTION_EXECUTION_ #endif -/* forward declarations */ -static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp); -static int arm9tdmi_quit(void); - -target_type_t arm9tdmi_target = -{ - .name = "arm9tdmi", - - .poll = arm7_9_poll, - .arch_state = armv4_5_arch_state, - - .target_request_data = arm7_9_target_request_data, - - .halt = arm7_9_halt, - .resume = arm7_9_resume, - .step = arm7_9_step, - - .assert_reset = arm7_9_assert_reset, - .deassert_reset = arm7_9_deassert_reset, - .soft_reset_halt = arm7_9_soft_reset_halt, - - .get_gdb_reg_list = armv4_5_get_gdb_reg_list, - - .read_memory = arm7_9_read_memory, - .write_memory = arm7_9_write_memory, - .bulk_write_memory = arm7_9_bulk_write_memory, - .checksum_memory = arm7_9_checksum_memory, - .blank_check_memory = arm7_9_blank_check_memory, - - .run_algorithm = armv4_5_run_algorithm, - - .add_breakpoint = arm7_9_add_breakpoint, - .remove_breakpoint = arm7_9_remove_breakpoint, - .add_watchpoint = arm7_9_add_watchpoint, - .remove_watchpoint = arm7_9_remove_watchpoint, - - .register_commands = arm9tdmi_register_commands, - .target_create = arm9tdmi_target_create, - .init_target = arm9tdmi_init_target, - .examine = arm9tdmi_examine, - .quit = arm9tdmi_quit -}; - -static arm9tdmi_vector_t arm9tdmi_vectors[] = +static const arm9tdmi_vector_t arm9tdmi_vectors[] = { {"reset", ARM9TDMI_RESET_VECTOR}, {"undef", ARM9TDMI_UNDEF_VECTOR}, @@ -103,9 +60,7 @@ static arm9tdmi_vector_t arm9tdmi_vectors[] = int arm9tdmi_examine_debug_reason(target_t *target) { int retval = ERROR_OK; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); /* only check the debug reason if we don't know it already */ if ((target->debug_reason != DBG_REASON_DBGRQ) @@ -166,8 +121,11 @@ int arm9tdmi_examine_debug_reason(target_t *target) return ERROR_OK; } -/* put an instruction in the ARM9TDMI pipeline or write the data bus, and optionally read data */ -int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, uint32_t out, uint32_t *in, int sysspeed) +/* put an instruction in the ARM9TDMI pipeline or write the data bus, + * and optionally read data + */ +int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, + uint32_t out, uint32_t *in, int sysspeed) { int retval = ERROR_OK; scan_field_t fields[3]; @@ -297,9 +255,12 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, uint32_t *in) extern void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip); -static int arm9endianness(jtag_callback_data_t arg, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured) +static int arm9endianness(jtag_callback_data_t arg, + jtag_callback_data_t size, jtag_callback_data_t be, + jtag_callback_data_t captured) { - uint8_t *in = (uint8_t *)arg; + uint8_t *in = (uint8_t *)arg; + arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 0); return ERROR_OK; } @@ -308,7 +269,8 @@ static int arm9endianness(jtag_callback_data_t arg, jtag_callback_data_t size, j * the *in pointer points to a buffer where elements of 'size' bytes * are stored in big (be == 1) or little (be == 0) endianness */ -int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be) +int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, + void *in, int size, int be) { int retval = ERROR_OK; scan_field_t fields[3]; @@ -367,9 +329,7 @@ static void arm9tdmi_change_to_arm(target_t *target, uint32_t *r0, uint32_t *pc) { int retval = ERROR_OK; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* save r0 before using it and put system in ARM state @@ -419,12 +379,11 @@ static void arm9tdmi_change_to_arm(target_t *target, *pc -= 0xc; } -void arm9tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_regs[16]) +void arm9tdmi_read_core_regs(target_t *target, + uint32_t mask, uint32_t* core_regs[16]) { int i; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* STMIA r0-15, [r0] at debug speed @@ -449,9 +408,7 @@ static void arm9tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void* buffer, int size) { int i; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; int be = (target->endianness == TARGET_BIG_ENDIAN) ? 1 : 0; uint32_t *buf_u32 = buffer; @@ -489,9 +446,7 @@ static void arm9tdmi_read_core_regs_target_buffer(target_t *target, static void arm9tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* MRS r0, cpsr */ @@ -513,9 +468,7 @@ static void arm9tdmi_read_xpsr(target_t *target, uint32_t *xpsr, int spsr) static void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; LOG_DEBUG("xpsr: %8.8" PRIx32 ", spsr: %i", xpsr, spsr); @@ -550,9 +503,7 @@ static void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr) static void arm9tdmi_write_xpsr_im8(target_t *target, uint8_t xpsr_im, int rot, int spsr) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; LOG_DEBUG("xpsr_im: %2.2x, rot: %i, spsr: %i", xpsr_im, rot, spsr); @@ -574,12 +525,11 @@ static void arm9tdmi_write_xpsr_im8(target_t *target, } } -void arm9tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_regs[16]) +void arm9tdmi_write_core_regs(target_t *target, + uint32_t mask, uint32_t core_regs[16]) { int i; - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* LDMIA r0-15, [r0] at debug speed @@ -603,9 +553,7 @@ void arm9tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_reg void arm9tdmi_load_word_regs(target_t *target, uint32_t mask) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* put system-speed load-multiple into the pipeline */ @@ -615,9 +563,7 @@ void arm9tdmi_load_word_regs(target_t *target, uint32_t mask) void arm9tdmi_load_hword_reg(target_t *target, int num) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* put system-speed load half-word into the pipeline */ @@ -627,9 +573,7 @@ void arm9tdmi_load_hword_reg(target_t *target, int num) void arm9tdmi_load_byte_reg(target_t *target, int num) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* put system-speed load byte into the pipeline */ @@ -639,9 +583,7 @@ void arm9tdmi_load_byte_reg(target_t *target, int num) void arm9tdmi_store_word_regs(target_t *target, uint32_t mask) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* put system-speed store-multiple into the pipeline */ @@ -651,9 +593,7 @@ void arm9tdmi_store_word_regs(target_t *target, uint32_t mask) void arm9tdmi_store_hword_reg(target_t *target, int num) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* put system-speed store half-word into the pipeline */ @@ -663,9 +603,7 @@ void arm9tdmi_store_hword_reg(target_t *target, int num) void arm9tdmi_store_byte_reg(target_t *target, int num) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* put system-speed store byte into the pipeline */ @@ -675,9 +613,7 @@ void arm9tdmi_store_byte_reg(target_t *target, int num) static void arm9tdmi_write_pc(target_t *target, uint32_t pc) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; /* LDMIA r0-15, [r0] at debug speed @@ -701,9 +637,7 @@ static void arm9tdmi_write_pc(target_t *target, uint32_t pc) void arm9tdmi_branch_resume(target_t *target) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); arm_jtag_t *jtag_info = &arm7_9->jtag_info; arm9tdmi_clock_out(jtag_info, ARMV4_5_B(0xfffffc, 0), 0, NULL, 0); @@ -714,9 +648,8 @@ static void arm9tdmi_branch_resume_thumb(target_t *target) { LOG_DEBUG("-"); - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + struct armv4_5_common_s *armv4_5 = &arm7_9->armv4_5_common; arm_jtag_t *jtag_info = &arm7_9->jtag_info; reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT]; @@ -772,9 +705,7 @@ static void arm9tdmi_branch_resume_thumb(target_t *target) void arm9tdmi_enable_single_step(target_t *target, uint32_t next_pc) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); if (arm7_9->has_single_step) { @@ -789,9 +720,7 @@ void arm9tdmi_enable_single_step(target_t *target, uint32_t next_pc) void arm9tdmi_disable_single_step(target_t *target) { - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); if (arm7_9->has_single_step) { @@ -807,8 +736,7 @@ void arm9tdmi_disable_single_step(target_t *target) static void arm9tdmi_build_reg_cache(target_t *target) { reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache); - /* get pointers to arch-specific information */ - armv4_5_common_t *armv4_5 = target->arch_info; + struct armv4_5_common_s *armv4_5 = target_to_armv4_5(target); (*cache_p) = armv4_5_build_reg_cache(target, armv4_5); armv4_5->core_cache = (*cache_p); @@ -816,10 +744,9 @@ static void arm9tdmi_build_reg_cache(target_t *target) int arm9tdmi_examine(struct target_s *target) { - /* get pointers to arch-specific information */ int retval; - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9 = armv4_5->arch_info; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); + if (!target_was_examined(target)) { reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache); @@ -831,11 +758,12 @@ int arm9tdmi_examine(struct target_s *target) (*cache_p) = t; arm7_9->eice_cache = (*cache_p); - if (arm7_9->etm_ctx) + if (arm7_9->armv4_5_common.etm) { arm_jtag_t *jtag_info = &arm7_9->jtag_info; - (*cache_p)->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx); - arm7_9->etm_ctx->reg_cache = (*cache_p)->next; + (*cache_p)->next = etm_build_reg_cache(target, + jtag_info, arm7_9->armv4_5_common.etm); + arm7_9->armv4_5_common.etm->reg_cache = (*cache_p)->next; } target_set_examined(target); } @@ -843,7 +771,7 @@ int arm9tdmi_examine(struct target_s *target) return retval; if ((retval = arm7_9_setup(target)) != ERROR_OK) return retval; - if (arm7_9->etm_ctx) + if (arm7_9->armv4_5_common.etm) { if ((retval = etm_setup(target)) != ERROR_OK) return retval; @@ -851,16 +779,10 @@ int arm9tdmi_examine(struct target_s *target) return ERROR_OK; } -int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target) +int arm9tdmi_init_target(struct command_context_s *cmd_ctx, + struct target_s *target) { - arm9tdmi_build_reg_cache(target); - - return ERROR_OK; -} - -static int arm9tdmi_quit(void) -{ return ERROR_OK; } @@ -902,7 +824,6 @@ int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_ arm7_9->enable_single_step = arm9tdmi_enable_single_step; arm7_9->disable_single_step = arm9tdmi_disable_single_step; - arm7_9->pre_debug_entry = NULL; arm7_9->post_debug_entry = NULL; arm7_9->pre_restore_context = NULL; @@ -913,10 +834,6 @@ int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_ arm7_9->thumb_bkpt = 0xdeee; arm7_9->dbgreq_adjust_pc = 3; - arm7_9->arch_info = arm9tdmi; - - arm9tdmi->common_magic = ARM9TDMI_COMMON_MAGIC; - arm9tdmi->arch_info = NULL; arm7_9_init_arch_info(target, arm7_9); @@ -929,38 +846,6 @@ int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_ return ERROR_OK; } -static int arm9tdmi_get_arch_pointers(target_t *target, - armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, - arm9tdmi_common_t **arm9tdmi_p) -{ - armv4_5_common_t *armv4_5 = target->arch_info; - arm7_9_common_t *arm7_9; - arm9tdmi_common_t *arm9tdmi; - - if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) - { - return -1; - } - - arm7_9 = armv4_5->arch_info; - if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC) - { - return -1; - } - - arm9tdmi = arm7_9->arch_info; - if (arm9tdmi->common_magic != ARM9TDMI_COMMON_MAGIC) - { - return -1; - } - - *armv4_5_p = armv4_5; - *arm7_9_p = arm7_9; - *arm9tdmi_p = arm9tdmi; - - return ERROR_OK; -} - static int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp) { arm9tdmi_common_t *arm9tdmi = calloc(1,sizeof(arm9tdmi_common_t)); @@ -975,17 +860,17 @@ static int handle_arm9tdmi_catch_vectors_command( struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - arm7_9_common_t *arm7_9; - arm9tdmi_common_t *arm9tdmi; + struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target); reg_t *vector_catch; uint32_t vector_catch_value; int i, j; - if (arm9tdmi_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi) != ERROR_OK) - { - command_print(cmd_ctx, "current target isn't an ARM9 based target"); - return ERROR_OK; + /* it's uncommon, but some ARM7 chips can support this */ + if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC + || !arm7_9->has_vector_catch) { + command_print(cmd_ctx, "target doesn't have EmbeddedICE " + "with vector_catch"); + return ERROR_TARGET_INVALID; } vector_catch = &arm7_9->eice_cache->reg_list[EICE_VEC_CATCH]; @@ -1042,14 +927,11 @@ static int handle_arm9tdmi_catch_vectors_command( embeddedice_store_reg(vector_catch); } - /* output current settings (skip RESERVED vector) */ - for (i = 0; i < 8; i++) - { - if (i != 5) - { - command_print(cmd_ctx, "%s: %s", arm9tdmi_vectors[i].name, - (vector_catch_value & (1 << i)) ? "catch" : "don't catch"); - } + /* output current settings */ + for (i = 0; arm9tdmi_vectors[i].name; i++) { + command_print(cmd_ctx, "%s: %s", arm9tdmi_vectors[i].name, + (vector_catch_value & arm9tdmi_vectors[i].value) + ? "catch" : "don't catch"); } return ERROR_OK; @@ -1071,3 +953,41 @@ int arm9tdmi_register_commands(struct command_context_s *cmd_ctx) return retval; } +/** Holds methods for ARM9TDMI targets. */ +target_type_t arm9tdmi_target = +{ + .name = "arm9tdmi", + + .poll = arm7_9_poll, + .arch_state = armv4_5_arch_state, + + .target_request_data = arm7_9_target_request_data, + + .halt = arm7_9_halt, + .resume = arm7_9_resume, + .step = arm7_9_step, + + .assert_reset = arm7_9_assert_reset, + .deassert_reset = arm7_9_deassert_reset, + .soft_reset_halt = arm7_9_soft_reset_halt, + + .get_gdb_reg_list = armv4_5_get_gdb_reg_list, + + .read_memory = arm7_9_read_memory, + .write_memory = arm7_9_write_memory, + .bulk_write_memory = arm7_9_bulk_write_memory, + .checksum_memory = arm7_9_checksum_memory, + .blank_check_memory = arm7_9_blank_check_memory, + + .run_algorithm = armv4_5_run_algorithm, + + .add_breakpoint = arm7_9_add_breakpoint, + .remove_breakpoint = arm7_9_remove_breakpoint, + .add_watchpoint = arm7_9_add_watchpoint, + .remove_watchpoint = arm7_9_remove_watchpoint, + + .register_commands = arm9tdmi_register_commands, + .target_create = arm9tdmi_target_create, + .init_target = arm9tdmi_init_target, + .examine = arm9tdmi_examine, +};