X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm_adi_v5.c;h=81edba4e3ee91adfe9370afbbf2905f2a27f1427;hb=4cc359794420dbe0aedba38bde0ee4d871cdb354;hp=39d8bde9092efe7174e986faebae926b1e0127cb;hpb=b62c8d600995638081f9a34c358db58337df7bdb;p=openocd.git diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 39d8bde909..81edba4e3e 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -316,12 +316,12 @@ int mem_ap_write_buf_u32(struct adiv5_dap *dap, uint8_t *buffer, int count, uint for (writecount = 0; writecount < blocksize; writecount++) { retval = dap_queue_ap_write(dap, AP_REG_DRW, - *(uint32_t *) (buffer + 4 * writecount)); + *(uint32_t *) ((void *) (buffer + 4 * writecount))); if (retval != ERROR_OK) break; } - if (dap_run(dap) == ERROR_OK) + if ((retval = dap_run(dap)) == ERROR_OK) { wcount = wcount - blocksize; address = address + 4 * blocksize; @@ -335,8 +335,7 @@ int mem_ap_write_buf_u32(struct adiv5_dap *dap, uint8_t *buffer, int count, uint if (errorcount > 1) { LOG_WARNING("Block write error address 0x%" PRIx32 ", wcount 0x%x", address, wcount); - /* REVISIT return the *actual* fault code */ - return ERROR_JTAG_DEVICE_ERROR; + return retval; } } @@ -406,13 +405,12 @@ static int mem_ap_write_buf_packed_u16(struct adiv5_dap *dap, if (retval != ERROR_OK) break; - if (dap_run(dap) != ERROR_OK) + if ((retval = dap_run(dap)) != ERROR_OK) { LOG_WARNING("Block write error address " "0x%" PRIx32 ", count 0x%x", address, count); - /* REVISIT return *actual* fault code */ - return ERROR_JTAG_DEVICE_ERROR; + return retval; } } @@ -515,13 +513,12 @@ static int mem_ap_write_buf_packed_u8(struct adiv5_dap *dap, if (retval != ERROR_OK) break; - if (dap_run(dap) != ERROR_OK) + if ((retval = dap_run(dap)) != ERROR_OK) { LOG_WARNING("Block write error address " "0x%" PRIx32 ", count 0x%x", address, count); - /* REVISIT return *actual* fault code */ - return ERROR_JTAG_DEVICE_ERROR; + return retval; } } @@ -712,11 +709,12 @@ static int mem_ap_read_buf_packed_u16(struct adiv5_dap *dap, do { retval = dap_queue_ap_read(dap, AP_REG_DRW, &invalue); - if (dap_run(dap) != ERROR_OK) + if (retval != ERROR_OK) + return retval; + if ((retval = dap_run(dap)) != ERROR_OK) { LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count); - /* REVISIT return the *actual* fault code */ - return ERROR_JTAG_DEVICE_ERROR; + return retval; } nbytes = MIN((readcount << 1), 4); @@ -821,11 +819,12 @@ static int mem_ap_read_buf_packed_u8(struct adiv5_dap *dap, do { retval = dap_queue_ap_read(dap, AP_REG_DRW, &invalue); - if (dap_run(dap) != ERROR_OK) + if (retval != ERROR_OK) + return retval; + if ((retval = dap_run(dap)) != ERROR_OK) { LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count); - /* REVISIT return the *actual* fault code */ - return ERROR_JTAG_DEVICE_ERROR; + return retval; } nbytes = MIN(readcount, 4); @@ -907,7 +906,7 @@ extern const struct dap_ops jtag_dp_ops; */ int ahbap_debugport_init(struct adiv5_dap *dap) { - uint32_t idreg, romaddr, dummy; + uint32_t dummy; uint32_t ctrlstat; int cnt = 0; int retval; @@ -986,22 +985,6 @@ int ahbap_debugport_init(struct adiv5_dap *dap) if (retval != ERROR_OK) return retval; - /* - * REVISIT this isn't actually *initializing* anything in an AP, - * and doesn't care if it's a MEM-AP at all (much less AHB-AP). - * Should it? If the ROM address is valid, is this the right - * place to scan the table and do any topology detection? - */ - retval = dap_queue_ap_read(dap, AP_REG_IDR, &idreg); - retval = dap_queue_ap_read(dap, AP_REG_BASE, &romaddr); - - if ((retval = dap_run(dap)) != ERROR_OK) - return retval; - - LOG_DEBUG("MEM-AP #%" PRId32 " ID Register 0x%" PRIx32 - ", Debug ROM Address 0x%" PRIx32, - dap->apsel, idreg, romaddr); - return ERROR_OK; } @@ -1023,14 +1006,22 @@ is_dap_cid_ok(uint32_t cid3, uint32_t cid2, uint32_t cid1, uint32_t cid0) && ((cid1 & 0x0f) == 0) && cid0 == 0x0d; } -static int dap_info_command(struct command_context *cmd_ctx, - struct adiv5_dap *dap, int apsel) +struct broken_cpu { + uint32_t dbgbase; + uint32_t apid; + uint32_t correct_dbgbase; + char *model; +} broken_cpus[] = { + { 0x80000000, 0x04770002, 0x60000000, "imx51" }, +}; + +int dap_get_debugbase(struct adiv5_dap *dap, int apsel, + uint32_t *out_dbgbase, uint32_t *out_apid) { + uint32_t apselold; int retval; + unsigned int i; uint32_t dbgbase, apid; - int romtable_present = 0; - uint8_t mem_ap; - uint32_t apselold; /* AP address is in bits 31:24 of DP_SELECT */ if (apsel >= 256) @@ -1038,12 +1029,96 @@ static int dap_info_command(struct command_context *cmd_ctx, apselold = dap->apsel; dap_ap_select(dap, apsel); + retval = dap_queue_ap_read(dap, AP_REG_BASE, &dbgbase); + if (retval != ERROR_OK) + return retval; retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid); + if (retval != ERROR_OK) + return retval; retval = dap_run(dap); if (retval != ERROR_OK) return retval; + /* Some CPUs are messed up, so fixup if needed. */ + for (i = 0; i < sizeof(broken_cpus)/sizeof(struct broken_cpu); i++) + if (broken_cpus[i].dbgbase == dbgbase && + broken_cpus[i].apid == apid) { + LOG_WARNING("Found broken CPU (%s), trying to fixup " + "ROM Table location from 0x%08x to 0x%08x", + broken_cpus[i].model, dbgbase, + broken_cpus[i].correct_dbgbase); + dbgbase = broken_cpus[i].correct_dbgbase; + break; + } + + dap_ap_select(dap, apselold); + + /* The asignment happens only here to prevent modification of these + * values before they are certain. */ + *out_dbgbase = dbgbase; + *out_apid = apid; + + return ERROR_OK; +} + +int dap_lookup_cs_component(struct adiv5_dap *dap, int apsel, + uint32_t dbgbase, uint8_t type, uint32_t *addr) +{ + uint32_t apselold; + uint32_t romentry, entry_offset = 0, component_base, devtype; + int retval = ERROR_FAIL; + + if (apsel >= 256) + return ERROR_INVALID_ARGUMENTS; + + apselold = dap->apsel; + dap_ap_select(dap, apsel); + + do + { + retval = mem_ap_read_atomic_u32(dap, (dbgbase&0xFFFFF000) | + entry_offset, &romentry); + if (retval != ERROR_OK) + return retval; + + component_base = (dbgbase & 0xFFFFF000) + + (romentry & 0xFFFFF000); + + if (romentry & 0x1) { + retval = mem_ap_read_atomic_u32(dap, + (component_base & 0xfffff000) | 0xfcc, + &devtype); + if ((devtype & 0xff) == type) { + *addr = component_base; + retval = ERROR_OK; + break; + } + } + entry_offset += 4; + } while (romentry > 0); + + dap_ap_select(dap, apselold); + + return retval; +} + +static int dap_info_command(struct command_context *cmd_ctx, + struct adiv5_dap *dap, int apsel) +{ + int retval; + uint32_t dbgbase, apid; + int romtable_present = 0; + uint8_t mem_ap; + uint32_t apselold; + + retval = dap_get_debugbase(dap, apsel, &dbgbase, &apid); + if (retval != ERROR_OK) + return retval; + + apselold = dap->apsel; + dap_ap_select(dap, apsel); + /* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */ mem_ap = ((apid&0x10000) && ((apid&0x0F) != 0)); command_print(cmd_ctx, "AP ID register 0x%8.8" PRIx32, apid); @@ -1490,6 +1565,8 @@ COMMAND_HANDLER(dap_baseaddr_command) * use the ID register to verify it's a MEM-AP. */ retval = dap_queue_ap_read(dap, AP_REG_BASE, &baseaddr); + if (retval != ERROR_OK) + return retval; retval = dap_run(dap); if (retval != ERROR_OK) return retval; @@ -1553,6 +1630,8 @@ COMMAND_HANDLER(dap_apsel_command) dap_ap_select(dap, apsel); retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid); + if (retval != ERROR_OK) + return retval; retval = dap_run(dap); if (retval != ERROR_OK) return retval; @@ -1591,6 +1670,8 @@ COMMAND_HANDLER(dap_apid_command) dap_ap_select(dap, apsel); retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid); + if (retval != ERROR_OK) + return retval; retval = dap_run(dap); if (retval != ERROR_OK) return retval;