X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm_adi_v5.c;h=dcad0fbcf9ecdee73ad8658e3f37be4313bd58c5;hb=6f8b8593d63bc9781435270a54b6f7d245eecd8e;hp=d30dd50324ccbdce2d78ff839da7bcb97ca454a3;hpb=c8ea748dc22660dad934537384d35903dfcc492e;p=openocd.git

diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index d30dd50324..dcad0fbcf9 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -69,6 +69,7 @@
 #include "config.h"
 #endif
 
+#include "arm.h"
 #include "arm_adi_v5.h"
 #include <helper/time_support.h>
 
@@ -84,286 +85,12 @@ static uint32_t max_tar_block_size(uint32_t tar_autoincr_block, uint32_t address
 	return (tar_autoincr_block - ((tar_autoincr_block - 1) & address)) >> 2;
 }
 
-/***************************************************************************
- *                                                                         *
- * DPACC and APACC scanchain access through JTAG-DP                        *
- *                                                                         *
-***************************************************************************/
-
-/**
- * Scan DPACC or APACC using target ordered uint8_t buffers.  No endianness
- * conversions are performed.  See section 4.4.3 of the ADIv5 spec, which
- * discusses operations which access these registers.
- *
- * Note that only one scan is performed.  If RnW is set, a separate scan
- * will be needed to collect the data which was read; the "invalue" collects
- * the posted result of a preceding operation, not the current one.
- *
- * @param swjdp the DAP
- * @param instr JTAG_DP_APACC (AP access) or JTAG_DP_DPACC (DP access)
- * @param reg_addr two significant bits; A[3:2]; for APACC access, the
- *	SELECT register has more addressing bits.
- * @param RnW false iff outvalue will be written to the DP or AP
- * @param outvalue points to a 32-bit (little-endian) integer
- * @param invalue NULL, or points to a 32-bit (little-endian) integer
- * @param ack points to where the three bit JTAG_ACK_* code will be stored
- */
-static int adi_jtag_dp_scan(struct swjdp_common *swjdp,
-		uint8_t instr, uint8_t reg_addr, uint8_t RnW,
-		uint8_t *outvalue, uint8_t *invalue, uint8_t *ack)
-{
-	struct arm_jtag *jtag_info = swjdp->jtag_info;
-	struct scan_field fields[2];
-	uint8_t out_addr_buf;
-
-	jtag_set_end_state(TAP_IDLE);
-	arm_jtag_set_instr(jtag_info, instr, NULL);
-
-	/* Scan out a read or write operation using some DP or AP register.
-	 * For APACC access with any sticky error flag set, this is discarded.
-	 */
-	fields[0].tap = jtag_info->tap;
-	fields[0].num_bits = 3;
-	buf_set_u32(&out_addr_buf, 0, 3, ((reg_addr >> 1) & 0x6) | (RnW & 0x1));
-	fields[0].out_value = &out_addr_buf;
-	fields[0].in_value = ack;
-
-	/* NOTE: if we receive JTAG_ACK_WAIT, the previous operation did not
-	 * complete; data we write is discarded, data we read is unpredictable.
-	 * When overrun detect is active, STICKYORUN is set.
-	 */
-
-	fields[1].tap = jtag_info->tap;
-	fields[1].num_bits = 32;
-	fields[1].out_value = outvalue;
-	fields[1].in_value = invalue;
-
-	jtag_add_dr_scan(2, fields, jtag_get_end_state());
-
-	/* Add specified number of tck clocks after starting memory bus
-	 * access, giving the hardware time to complete the access.
-	 * They provide more time for the (MEM) AP to complete the read ...
-	 * See "Minimum Response Time" for JTAG-DP, in the ADIv5 spec.
-	 */
-	if ((instr == JTAG_DP_APACC)
-			&& ((reg_addr == AP_REG_DRW)
-				|| ((reg_addr & 0xF0) == AP_REG_BD0))
-			&& (swjdp->memaccess_tck != 0))
-		jtag_add_runtest(swjdp->memaccess_tck,
-				jtag_set_end_state(TAP_IDLE));
-
-	return jtag_get_error();
-}
-
-/**
- * Scan DPACC or APACC out and in from host ordered uint32_t buffers.
- * This is exactly like adi_jtag_dp_scan(), except that endianness
- * conversions are performed (so the types of invalue and outvalue
- * must be different).
- */
-static int adi_jtag_dp_scan_u32(struct swjdp_common *swjdp,
-		uint8_t instr, uint8_t reg_addr, uint8_t RnW,
-		uint32_t outvalue, uint32_t *invalue, uint8_t *ack)
-{
-	uint8_t out_value_buf[4];
-	int retval;
-
-	buf_set_u32(out_value_buf, 0, 32, outvalue);
-
-	retval = adi_jtag_dp_scan(swjdp, instr, reg_addr, RnW,
-			out_value_buf, (uint8_t *)invalue, ack);
-	if (retval != ERROR_OK)
-		return retval;
-
-	if (invalue)
-		jtag_add_callback(arm_le_to_h_u32,
-				(jtag_callback_data_t) invalue);
-
-	return retval;
-}
-
-/**
- * Utility to write AP registers.
- */
-static inline int ap_write_check(struct swjdp_common *dap,
-		uint8_t reg_addr, uint8_t *outvalue)
-{
-	return adi_jtag_dp_scan(dap, JTAG_DP_APACC, reg_addr, DPAP_WRITE,
-			outvalue, NULL, NULL);
-}
-
-static int scan_inout_check_u32(struct swjdp_common *swjdp,
-		uint8_t instr, uint8_t reg_addr, uint8_t RnW,
-		uint32_t outvalue, uint32_t *invalue)
-{
-	int retval;
-
-	/* Issue the read or write */
-	retval = adi_jtag_dp_scan_u32(swjdp, instr, reg_addr,
-			RnW, outvalue, NULL, NULL);
-	if (retval != ERROR_OK)
-		return retval;
-
-	/* For reads,  collect posted value; RDBUFF has no other effect.
-	 * Assumes read gets acked with OK/FAULT, and CTRL_STAT says "OK".
-	 */
-	if ((RnW == DPAP_READ) && (invalue != NULL))
-		retval = adi_jtag_dp_scan_u32(swjdp, JTAG_DP_DPACC,
-				DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack);
-	return retval;
-}
-
-int jtagdp_transaction_endcheck(struct swjdp_common *swjdp)
-{
-	int retval;
-	uint32_t ctrlstat;
-
-	/* too expensive to call keep_alive() here */
-
-#if 0
-	/* Danger!!!! BROKEN!!!! */
-	scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-			DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-	/* Danger!!!! BROKEN!!!! Why will jtag_execute_queue() fail here????
-	R956 introduced the check on return value here and now Michael Schwingen reports
-	that this code no longer works....
-
-	https://lists.berlios.de/pipermail/openocd-development/2008-September/003107.html
-	*/
-	if ((retval = jtag_execute_queue()) != ERROR_OK)
-	{
-		LOG_ERROR("BUG: Why does this fail the first time????");
-	}
-	/* Why??? second time it works??? */
-#endif
-
-	/* Post CTRL/STAT read; discard any previous posted read value
-	 * but collect its ACK status.
-	 */
-	scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-			DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-	if ((retval = jtag_execute_queue()) != ERROR_OK)
-		return retval;
-
-	swjdp->ack = swjdp->ack & 0x7;
-
-	/* common code path avoids calling timeval_ms() */
-	if (swjdp->ack != JTAG_ACK_OK_FAULT)
-	{
-		long long then = timeval_ms();
-
-		while (swjdp->ack != JTAG_ACK_OK_FAULT)
-		{
-			if (swjdp->ack == JTAG_ACK_WAIT)
-			{
-				if ((timeval_ms()-then) > 1000)
-				{
-					/* NOTE:  this would be a good spot
-					 * to use JTAG_DP_ABORT.
-					 */
-					LOG_WARNING("Timeout (1000ms) waiting "
-						"for ACK=OK/FAULT "
-						"in JTAG-DP transaction");
-					return ERROR_JTAG_DEVICE_ERROR;
-				}
-			}
-			else
-			{
-				LOG_WARNING("Invalid ACK %#x "
-						"in JTAG-DP transaction",
-						swjdp->ack);
-				return ERROR_JTAG_DEVICE_ERROR;
-			}
-
-			scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-					DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-			if ((retval = jtag_execute_queue()) != ERROR_OK)
-				return retval;
-			swjdp->ack = swjdp->ack & 0x7;
-		}
-	}
-
-	/* REVISIT also STICKYCMP, for pushed comparisons (nyet used) */
-
-	/* Check for STICKYERR and STICKYORUN */
-	if (ctrlstat & (SSTICKYORUN | SSTICKYERR))
-	{
-		LOG_DEBUG("jtag-dp: CTRL/STAT error, 0x%" PRIx32, ctrlstat);
-		/* Check power to debug regions */
-		if ((ctrlstat & 0xf0000000) != 0xf0000000)
-			 ahbap_debugport_init(swjdp);
-		else
-		{
-			uint32_t mem_ap_csw, mem_ap_tar;
-
-			/* Maybe print information about last intended
-			 * MEM-AP access; but not if autoincrementing.
-			 * *Real* CSW and TAR values are always shown.
-			 */
-			if (swjdp->ap_tar_value != (uint32_t) -1)
-				LOG_DEBUG("MEM-AP Cached values: "
-					"ap_bank 0x%" PRIx32
-					", ap_csw 0x%" PRIx32
-					", ap_tar 0x%" PRIx32,
-					swjdp->ap_bank_value,
-					swjdp->ap_csw_value,
-					swjdp->ap_tar_value);
-
-			if (ctrlstat & SSTICKYORUN)
-				LOG_ERROR("JTAG-DP OVERRUN - check clock, "
-					"memaccess, or reduce jtag speed");
-
-			if (ctrlstat & SSTICKYERR)
-				LOG_ERROR("JTAG-DP STICKY ERROR");
-
-			/* Clear Sticky Error Bits */
-			scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-					DP_CTRL_STAT, DPAP_WRITE,
-					swjdp->dp_ctrl_stat | SSTICKYORUN
-						| SSTICKYERR, NULL);
-			scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-					DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat);
-			if ((retval = jtag_execute_queue()) != ERROR_OK)
-				return retval;
-
-			LOG_DEBUG("jtag-dp: CTRL/STAT 0x%" PRIx32, ctrlstat);
-
-			dap_ap_read_reg_u32(swjdp, AP_REG_CSW, &mem_ap_csw);
-			dap_ap_read_reg_u32(swjdp, AP_REG_TAR, &mem_ap_tar);
-			if ((retval = jtag_execute_queue()) != ERROR_OK)
-				return retval;
-			LOG_ERROR("MEM_AP_CSW 0x%" PRIx32 ", MEM_AP_TAR 0x%"
-					PRIx32, mem_ap_csw, mem_ap_tar);
-
-		}
-		if ((retval = jtag_execute_queue()) != ERROR_OK)
-			return retval;
-		return ERROR_JTAG_DEVICE_ERROR;
-	}
-
-	return ERROR_OK;
-}
-
 /***************************************************************************
  *                                                                         *
  * DP and MEM-AP  register access  through APACC and DPACC                 *
  *                                                                         *
 ***************************************************************************/
 
-static int dap_dp_write_reg(struct swjdp_common *swjdp,
-		uint32_t value, uint8_t reg_addr)
-{
-	return scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-			reg_addr, DPAP_WRITE, value, NULL);
-}
-
-static int dap_dp_read_reg(struct swjdp_common *swjdp,
-		uint32_t *value, uint8_t reg_addr)
-{
-	return scan_inout_check_u32(swjdp, JTAG_DP_DPACC,
-			reg_addr, DPAP_READ, 0, value);
-}
-
 /**
  * Select one of the APs connected to the specified DAP.  The
  * selection is implicitly used with future AP transactions.
@@ -373,7 +100,7 @@ static int dap_dp_read_reg(struct swjdp_common *swjdp,
  * @param apsel Number of the AP to (implicitly) use with further
  *	transactions.  This normally identifies a MEM-AP.
  */
-void dap_ap_select(struct swjdp_common *swjdp,uint8_t apsel)
+void dap_ap_select(struct adiv5_dap *swjdp,uint8_t apsel)
 {
 	uint32_t select = (apsel << 24) & 0xFF000000;
 
@@ -389,73 +116,6 @@ void dap_ap_select(struct swjdp_common *swjdp,uint8_t apsel)
 	}
 }
 
-/** Select the AP register bank matching bits 7:4 of ap_reg. */
-static int dap_ap_bankselect(struct swjdp_common *swjdp, uint32_t ap_reg)
-{
-	uint32_t select = (ap_reg & 0x000000F0);
-
-	if (select != swjdp->ap_bank_value)
-	{
-		swjdp->ap_bank_value = select;
-		select |= swjdp->apsel;
-		return dap_dp_write_reg(swjdp, select, DP_SELECT);
-	} else
-		return ERROR_OK;
-}
-
-static int dap_ap_write_reg(struct swjdp_common *swjdp,
-		uint32_t reg_addr, uint8_t *out_value_buf)
-{
-	int retval;
-
-	retval = dap_ap_bankselect(swjdp, reg_addr);
-	if (retval != ERROR_OK)
-		return retval;
-
-	return ap_write_check(swjdp, reg_addr, out_value_buf);
-}
-
-/**
- * Asynchronous (queued) AP register write.
- *
- * @param swjdp The DAP whose currently selected AP will be written.
- * @param reg_addr Eight bit AP register address.
- * @param value Word to be written at reg_addr
- *
- * @return ERROR_OK if the transaction was properly queued, else a fault code.
- */
-int dap_ap_write_reg_u32(struct swjdp_common *swjdp,
-		uint32_t reg_addr, uint32_t value)
-{
-	uint8_t out_value_buf[4];
-
-	buf_set_u32(out_value_buf, 0, 32, value);
-	return dap_ap_write_reg(swjdp,
-			reg_addr, out_value_buf);
-}
-
-/**
- * Asynchronous (queued) AP register eread.
- *
- * @param swjdp The DAP whose currently selected AP will be read.
- * @param reg_addr Eight bit AP register address.
- * @param value Points to where the 32-bit (little-endian) word will be stored.
- *
- * @return ERROR_OK if the transaction was properly queued, else a fault code.
- */
-int dap_ap_read_reg_u32(struct swjdp_common *swjdp,
-		uint32_t reg_addr, uint32_t *value)
-{
-	int retval;
-
-	retval = dap_ap_bankselect(swjdp, reg_addr);
-	if (retval != ERROR_OK)
-		return retval;
-
-	return scan_inout_check_u32(swjdp, JTAG_DP_APACC, reg_addr,
-			DPAP_READ, 0, value);
-}
-
 /**
  * Queue transactions setting up transfer parameters for the
  * currently selected MEM-AP.
@@ -475,7 +135,7 @@ int dap_ap_read_reg_u32(struct swjdp_common *swjdp,
  *
  * @return ERROR_OK if the transaction was properly queued, else a fault code.
  */
-int dap_setup_accessport(struct swjdp_common *swjdp, uint32_t csw, uint32_t tar)
+int dap_setup_accessport(struct adiv5_dap *swjdp, uint32_t csw, uint32_t tar)
 {
 	int retval;
 
@@ -483,7 +143,7 @@ int dap_setup_accessport(struct swjdp_common *swjdp, uint32_t csw, uint32_t tar)
 	if (csw != swjdp->ap_csw_value)
 	{
 		/* LOG_DEBUG("DAP: Set CSW %x",csw); */
-		retval = dap_ap_write_reg_u32(swjdp, AP_REG_CSW, csw);
+		retval = dap_queue_ap_write(swjdp, AP_REG_CSW, csw);
 		if (retval != ERROR_OK)
 			return retval;
 		swjdp->ap_csw_value = csw;
@@ -491,7 +151,7 @@ int dap_setup_accessport(struct swjdp_common *swjdp, uint32_t csw, uint32_t tar)
 	if (tar != swjdp->ap_tar_value)
 	{
 		/* LOG_DEBUG("DAP: Set TAR %x",tar); */
-		retval = dap_ap_write_reg_u32(swjdp, AP_REG_TAR, tar);
+		retval = dap_queue_ap_write(swjdp, AP_REG_TAR, tar);
 		if (retval != ERROR_OK)
 			return retval;
 		swjdp->ap_tar_value = tar;
@@ -513,7 +173,7 @@ int dap_setup_accessport(struct swjdp_common *swjdp, uint32_t csw, uint32_t tar)
  *
  * @return ERROR_OK for success.  Otherwise a fault code.
  */
-int mem_ap_read_u32(struct swjdp_common *swjdp, uint32_t address,
+int mem_ap_read_u32(struct adiv5_dap *swjdp, uint32_t address,
 		uint32_t *value)
 {
 	int retval;
@@ -526,7 +186,7 @@ int mem_ap_read_u32(struct swjdp_common *swjdp, uint32_t address,
 	if (retval != ERROR_OK)
 		return retval;
 
-	return dap_ap_read_reg_u32(swjdp, AP_REG_BD0 | (address & 0xC), value);
+	return dap_queue_ap_read(swjdp, AP_REG_BD0 | (address & 0xC), value);
 }
 
 /**
@@ -541,7 +201,7 @@ int mem_ap_read_u32(struct swjdp_common *swjdp, uint32_t address,
  * @return ERROR_OK for success; *value holds the result.
  * Otherwise a fault code.
  */
-int mem_ap_read_atomic_u32(struct swjdp_common *swjdp, uint32_t address,
+int mem_ap_read_atomic_u32(struct adiv5_dap *swjdp, uint32_t address,
 		uint32_t *value)
 {
 	int retval;
@@ -550,7 +210,7 @@ int mem_ap_read_atomic_u32(struct swjdp_common *swjdp, uint32_t address,
 	if (retval != ERROR_OK)
 		return retval;
 
-	return jtagdp_transaction_endcheck(swjdp);
+	return dap_run(swjdp);
 }
 
 /**
@@ -564,7 +224,7 @@ int mem_ap_read_atomic_u32(struct swjdp_common *swjdp, uint32_t address,
  *
  * @return ERROR_OK for success.  Otherwise a fault code.
  */
-int mem_ap_write_u32(struct swjdp_common *swjdp, uint32_t address,
+int mem_ap_write_u32(struct adiv5_dap *swjdp, uint32_t address,
 		uint32_t value)
 {
 	int retval;
@@ -577,7 +237,7 @@ int mem_ap_write_u32(struct swjdp_common *swjdp, uint32_t address,
 	if (retval != ERROR_OK)
 		return retval;
 
-	return dap_ap_write_reg_u32(swjdp, AP_REG_BD0 | (address & 0xC),
+	return dap_queue_ap_write(swjdp, AP_REG_BD0 | (address & 0xC),
 			value);
 }
 
@@ -592,7 +252,7 @@ int mem_ap_write_u32(struct swjdp_common *swjdp, uint32_t address,
  *
  * @return ERROR_OK for success; the data was written.  Otherwise a fault code.
  */
-int mem_ap_write_atomic_u32(struct swjdp_common *swjdp, uint32_t address,
+int mem_ap_write_atomic_u32(struct adiv5_dap *swjdp, uint32_t address,
 		uint32_t value)
 {
 	int retval = mem_ap_write_u32(swjdp, address, value);
@@ -600,17 +260,17 @@ int mem_ap_write_atomic_u32(struct swjdp_common *swjdp, uint32_t address,
 	if (retval != ERROR_OK)
 		return retval;
 
-	return jtagdp_transaction_endcheck(swjdp);
+	return dap_run(swjdp);
 }
 
 /*****************************************************************************
 *                                                                            *
-* mem_ap_write_buf(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address) *
+* mem_ap_write_buf(struct adiv5_dap *swjdp, uint8_t *buffer, int count, uint32_t address) *
 *                                                                            *
 * Write a buffer in target order (little endian)                             *
 *                                                                            *
 *****************************************************************************/
-int mem_ap_write_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
+int mem_ap_write_buf_u32(struct adiv5_dap *swjdp, uint8_t *buffer, int count, uint32_t address)
 {
 	int wcount, blocksize, writecount, errorcount = 0, retval = ERROR_OK;
 	uint32_t adr = address;
@@ -653,10 +313,13 @@ int mem_ap_write_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 
 		for (writecount = 0; writecount < blocksize; writecount++)
 		{
-			dap_ap_write_reg(swjdp, AP_REG_DRW, buffer + 4 * writecount);
+			retval = dap_queue_ap_write(swjdp, AP_REG_DRW,
+				*(uint32_t *) (buffer + 4 * writecount));
+			if (retval != ERROR_OK)
+				break;
 		}
 
-		if (jtagdp_transaction_endcheck(swjdp) == ERROR_OK)
+		if (dap_run(swjdp) == ERROR_OK)
 		{
 			wcount = wcount - blocksize;
 			address = address + 4 * blocksize;
@@ -670,6 +333,7 @@ int mem_ap_write_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 		if (errorcount > 1)
 		{
 			LOG_WARNING("Block write error address 0x%" PRIx32 ", wcount 0x%x", address, wcount);
+			/* REVISIT return the *actual* fault code */
 			return ERROR_JTAG_DEVICE_ERROR;
 		}
 	}
@@ -677,7 +341,7 @@ int mem_ap_write_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 	return retval;
 }
 
-static int mem_ap_write_buf_packed_u16(struct swjdp_common *swjdp,
+static int mem_ap_write_buf_packed_u16(struct adiv5_dap *swjdp,
 		uint8_t *buffer, int count, uint32_t address)
 {
 	int retval = ERROR_OK;
@@ -732,12 +396,17 @@ static int mem_ap_write_buf_packed_u16(struct swjdp_common *swjdp,
 				}
 
 				memcpy(&outvalue, buffer, sizeof(uint32_t));
-				dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
-				if (jtagdp_transaction_endcheck(swjdp) != ERROR_OK)
+				retval = dap_queue_ap_write(swjdp,
+						AP_REG_DRW, outvalue);
+				if (retval != ERROR_OK)
+					break;
+
+				if (dap_run(swjdp) != ERROR_OK)
 				{
 					LOG_WARNING("Block write error address "
 						"0x%" PRIx32 ", count 0x%x",
 						address, count);
+					/* REVISIT return *actual* fault code */
 					return ERROR_JTAG_DEVICE_ERROR;
 				}
 			}
@@ -752,7 +421,7 @@ static int mem_ap_write_buf_packed_u16(struct swjdp_common *swjdp,
 	return retval;
 }
 
-int mem_ap_write_buf_u16(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
+int mem_ap_write_buf_u16(struct adiv5_dap *swjdp, uint8_t *buffer, int count, uint32_t address)
 {
 	int retval = ERROR_OK;
 
@@ -765,8 +434,14 @@ int mem_ap_write_buf_u16(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 		uint16_t svalue;
 		memcpy(&svalue, buffer, sizeof(uint16_t));
 		uint32_t outvalue = (uint32_t)svalue << 8 * (address & 0x3);
-		dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
-		retval = jtagdp_transaction_endcheck(swjdp);
+		retval = dap_queue_ap_write(swjdp, AP_REG_DRW, outvalue);
+		if (retval != ERROR_OK)
+			break;
+
+		retval = dap_run(swjdp);
+		if (retval != ERROR_OK)
+			break;
+
 		count -= 2;
 		address += 2;
 		buffer += 2;
@@ -775,7 +450,7 @@ int mem_ap_write_buf_u16(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 	return retval;
 }
 
-static int mem_ap_write_buf_packed_u8(struct swjdp_common *swjdp,
+static int mem_ap_write_buf_packed_u8(struct adiv5_dap *swjdp,
 		uint8_t *buffer, int count, uint32_t address)
 {
 	int retval = ERROR_OK;
@@ -825,12 +500,17 @@ static int mem_ap_write_buf_packed_u8(struct swjdp_common *swjdp,
 				}
 
 				memcpy(&outvalue, buffer, sizeof(uint32_t));
-				dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
-				if (jtagdp_transaction_endcheck(swjdp) != ERROR_OK)
+				retval = dap_queue_ap_write(swjdp,
+						AP_REG_DRW, outvalue);
+				if (retval != ERROR_OK)
+					break;
+
+				if (dap_run(swjdp) != ERROR_OK)
 				{
 					LOG_WARNING("Block write error address "
 						"0x%" PRIx32 ", count 0x%x",
 						address, count);
+					/* REVISIT return *actual* fault code */
 					return ERROR_JTAG_DEVICE_ERROR;
 				}
 			}
@@ -845,7 +525,7 @@ static int mem_ap_write_buf_packed_u8(struct swjdp_common *swjdp,
 	return retval;
 }
 
-int mem_ap_write_buf_u8(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
+int mem_ap_write_buf_u8(struct adiv5_dap *swjdp, uint8_t *buffer, int count, uint32_t address)
 {
 	int retval = ERROR_OK;
 
@@ -856,8 +536,14 @@ int mem_ap_write_buf_u8(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 	{
 		dap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_SINGLE, address);
 		uint32_t outvalue = (uint32_t)*buffer << 8 * (address & 0x3);
-		dap_ap_write_reg_u32(swjdp, AP_REG_DRW, outvalue);
-		retval = jtagdp_transaction_endcheck(swjdp);
+		retval = dap_queue_ap_write(swjdp, AP_REG_DRW, outvalue);
+		if (retval != ERROR_OK)
+			break;
+
+		retval = dap_run(swjdp);
+		if (retval != ERROR_OK)
+			break;
+
 		count--;
 		address++;
 		buffer++;
@@ -866,14 +552,23 @@ int mem_ap_write_buf_u8(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 	return retval;
 }
 
-/*********************************************************************************
-*                                                                                *
-* mem_ap_read_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)  *
-*                                                                                *
-* Read block fast in target order (little endian) into a buffer                  *
-*                                                                                *
-**********************************************************************************/
-int mem_ap_read_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
+/* FIXME don't import ... this is a temporary workaround for the
+ * mem_ap_read_buf_u32() mess, until it's no longer JTAG-specific.
+ */
+extern int adi_jtag_dp_scan(struct adiv5_dap *swjdp,
+		uint8_t instr, uint8_t reg_addr, uint8_t RnW,
+		uint8_t *outvalue, uint8_t *invalue, uint8_t *ack);
+
+/**
+ * Synchronously read a block of 32-bit words into a buffer
+ * @param swjdp The DAP connected to the MEM-AP.
+ * @param buffer where the words will be stored (in host byte order).
+ * @param count How many words to read.
+ * @param address Memory address from which to read words; all the
+ *	words must be readable by the currently selected MEM-AP.
+ */
+int mem_ap_read_buf_u32(struct adiv5_dap *swjdp, uint8_t *buffer,
+		int count, uint32_t address)
 {
 	int wcount, blocksize, readcount, errorcount = 0, retval = ERROR_OK;
 	uint32_t adr = address;
@@ -884,8 +579,12 @@ int mem_ap_read_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 
 	while (wcount > 0)
 	{
-		/* Adjust to read blocks within boundaries aligned to the TAR autoincremnent size*/
-		blocksize = max_tar_block_size(swjdp->tar_autoincr_block, address);
+		/* Adjust to read blocks within boundaries aligned to the
+		 * TAR autoincrement size (at least 2^10).  Autoincrement
+		 * mode avoids an extra per-word roundtrip to update TAR.
+		 */
+		blocksize = max_tar_block_size(swjdp->tar_autoincr_block,
+				address);
 		if (wcount < blocksize)
 			blocksize = wcount;
 
@@ -893,7 +592,15 @@ int mem_ap_read_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 		if (blocksize == 0)
 			blocksize = 1;
 
-		dap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_SINGLE, address);
+		dap_setup_accessport(swjdp, CSW_32BIT | CSW_ADDRINC_SINGLE,
+				address);
+
+		/* FIXME remove these three calls to adi_jtag_dp_scan(),
+		 * so this routine becomes transport-neutral.  Be careful
+		 * not to cause performance problems with JTAG; would it
+		 * suffice to loop over dap_queue_ap_read(), or would that
+		 * be slower when JTAG is the chosen transport?
+		 */
 
 		/* Scan out first read */
 		adi_jtag_dp_scan(swjdp, JTAG_DP_APACC, AP_REG_DRW,
@@ -915,7 +622,7 @@ int mem_ap_read_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 		adi_jtag_dp_scan(swjdp, JTAG_DP_DPACC, DP_RDBUFF,
 				DPAP_READ, 0, buffer + 4 * readcount,
 				&swjdp->ack);
-		if (jtagdp_transaction_endcheck(swjdp) == ERROR_OK)
+		if (dap_run(swjdp) == ERROR_OK)
 		{
 			wcount = wcount - blocksize;
 			address += 4 * blocksize;
@@ -928,7 +635,9 @@ int mem_ap_read_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 
 		if (errorcount > 1)
 		{
-			LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
+			LOG_WARNING("Block read error address 0x%" PRIx32
+				", count 0x%x", address, count);
+			/* REVISIT return the *actual* fault code */
 			return ERROR_JTAG_DEVICE_ERROR;
 		}
 	}
@@ -944,7 +653,8 @@ int mem_ap_read_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 
 			for (i = 0; i < 4; i++)
 			{
-				*((uint8_t*)pBuffer) = (data >> 8 * (adr & 0x3));
+				*((uint8_t*)pBuffer) =
+						(data >> 8 * (adr & 0x3));
 				pBuffer++;
 				adr++;
 			}
@@ -954,7 +664,7 @@ int mem_ap_read_buf_u32(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 	return retval;
 }
 
-static int mem_ap_read_buf_packed_u16(struct swjdp_common *swjdp,
+static int mem_ap_read_buf_packed_u16(struct adiv5_dap *swjdp,
 		uint8_t *buffer, int count, uint32_t address)
 {
 	uint32_t invalue;
@@ -981,10 +691,11 @@ static int mem_ap_read_buf_packed_u16(struct swjdp_common *swjdp,
 
 		do
 		{
-			dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue);
-			if (jtagdp_transaction_endcheck(swjdp) != ERROR_OK)
+			retval = dap_queue_ap_read(swjdp, AP_REG_DRW, &invalue);
+			if (dap_run(swjdp) != ERROR_OK)
 			{
 				LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
+				/* REVISIT return the *actual* fault code */
 				return ERROR_JTAG_DEVICE_ERROR;
 			}
 
@@ -1005,7 +716,16 @@ static int mem_ap_read_buf_packed_u16(struct swjdp_common *swjdp,
 	return retval;
 }
 
-int mem_ap_read_buf_u16(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
+/**
+ * Synchronously read a block of 16-bit halfwords into a buffer
+ * @param swjdp The DAP connected to the MEM-AP.
+ * @param buffer where the halfwords will be stored (in host byte order).
+ * @param count How many halfwords to read.
+ * @param address Memory address from which to read words; all the
+ *	words must be readable by the currently selected MEM-AP.
+ */
+int mem_ap_read_buf_u16(struct adiv5_dap *swjdp, uint8_t *buffer,
+		int count, uint32_t address)
 {
 	uint32_t invalue, i;
 	int retval = ERROR_OK;
@@ -1016,8 +736,14 @@ int mem_ap_read_buf_u16(struct swjdp_common *swjdp, uint8_t *buffer, int count,
 	while (count > 0)
 	{
 		dap_setup_accessport(swjdp, CSW_16BIT | CSW_ADDRINC_SINGLE, address);
-		dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue);
-		retval = jtagdp_transaction_endcheck(swjdp);
+		retval = dap_queue_ap_read(swjdp, AP_REG_DRW, &invalue);
+		if (retval != ERROR_OK)
+			break;
+
+		retval = dap_run(swjdp);
+		if (retval != ERROR_OK)
+			break;
+
 		if (address & 0x1)
 		{
 			for (i = 0; i < 2; i++)
@@ -1046,7 +772,7 @@ int mem_ap_read_buf_u16(struct swjdp_common *swjdp, uint8_t *buffer, int count,
  * The solution is to arrange for a large out/in scan in this loop and
  * and convert data afterwards.
  */
-static int mem_ap_read_buf_packed_u8(struct swjdp_common *swjdp,
+static int mem_ap_read_buf_packed_u8(struct adiv5_dap *swjdp,
 		uint8_t *buffer, int count, uint32_t address)
 {
 	uint32_t invalue;
@@ -1070,10 +796,11 @@ static int mem_ap_read_buf_packed_u8(struct swjdp_common *swjdp,
 
 		do
 		{
-			dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue);
-			if (jtagdp_transaction_endcheck(swjdp) != ERROR_OK)
+			retval = dap_queue_ap_read(swjdp, AP_REG_DRW, &invalue);
+			if (dap_run(swjdp) != ERROR_OK)
 			{
 				LOG_WARNING("Block read error address 0x%" PRIx32 ", count 0x%x", address, count);
+				/* REVISIT return the *actual* fault code */
 				return ERROR_JTAG_DEVICE_ERROR;
 			}
 
@@ -1094,7 +821,16 @@ static int mem_ap_read_buf_packed_u8(struct swjdp_common *swjdp,
 	return retval;
 }
 
-int mem_ap_read_buf_u8(struct swjdp_common *swjdp, uint8_t *buffer, int count, uint32_t address)
+/**
+ * Synchronously read a block of bytes into a buffer
+ * @param swjdp The DAP connected to the MEM-AP.
+ * @param buffer where the bytes will be stored.
+ * @param count How many bytes to read.
+ * @param address Memory address from which to read data; all the
+ *	data must be readable by the currently selected MEM-AP.
+ */
+int mem_ap_read_buf_u8(struct adiv5_dap *swjdp, uint8_t *buffer,
+		int count, uint32_t address)
 {
 	uint32_t invalue;
 	int retval = ERROR_OK;
@@ -1105,8 +841,11 @@ int mem_ap_read_buf_u8(struct swjdp_common *swjdp, uint8_t *buffer, int count, u
 	while (count > 0)
 	{
 		dap_setup_accessport(swjdp, CSW_8BIT | CSW_ADDRINC_SINGLE, address);
-		dap_ap_read_reg_u32(swjdp, AP_REG_DRW, &invalue);
-		retval = jtagdp_transaction_endcheck(swjdp);
+		retval = dap_queue_ap_read(swjdp, AP_REG_DRW, &invalue);
+		retval = dap_run(swjdp);
+		if (retval != ERROR_OK)
+			break;
+
 		*((uint8_t*)buffer) = (invalue >> 8 * (address & 0x3));
 		count--;
 		address++;
@@ -1116,6 +855,16 @@ int mem_ap_read_buf_u8(struct swjdp_common *swjdp, uint8_t *buffer, int count, u
 	return retval;
 }
 
+/*--------------------------------------------------------------------------*/
+
+
+/* FIXME don't import ... just initialize as
+ * part of DAP transport setup
+*/
+extern const struct dap_ops jtag_dp_ops;
+
+/*--------------------------------------------------------------------------*/
+
 /**
  * Initialize a DAP.  This sets up the power domains, prepares the DP
  * for further use, and arranges to use AP #0 for all AP operations
@@ -1128,7 +877,7 @@ int mem_ap_read_buf_u8(struct swjdp_common *swjdp, uint8_t *buffer, int count, u
  * in layering.  (JTAG is useful without any debug target; but not SWD.)
  * And this may not even use an AHB-AP ... e.g. DAP-Lite uses an APB-AP.
  */
-int ahbap_debugport_init(struct swjdp_common *swjdp)
+int ahbap_debugport_init(struct adiv5_dap *swjdp)
 {
 	uint32_t idreg, romaddr, dummy;
 	uint32_t ctrlstat;
@@ -1137,6 +886,9 @@ int ahbap_debugport_init(struct swjdp_common *swjdp)
 
 	LOG_DEBUG(" ");
 
+	/* JTAG-DP or SWJ-DP, in JTAG mode */
+	swjdp->ops = &jtag_dp_ops;
+
 	/* Default MEM-AP setup.
 	 *
 	 * REVISIT AP #0 may be an inappropriate default for this.
@@ -1147,23 +899,38 @@ int ahbap_debugport_init(struct swjdp_common *swjdp)
 	dap_ap_select(swjdp, 0);
 
 	/* DP initialization */
-	dap_dp_read_reg(swjdp, &dummy, DP_CTRL_STAT);
-	dap_dp_write_reg(swjdp, SSTICKYERR, DP_CTRL_STAT);
-	dap_dp_read_reg(swjdp, &dummy, DP_CTRL_STAT);
+
+	retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &dummy);
+	if (retval != ERROR_OK)
+		return retval;
+
+	retval = dap_queue_dp_write(swjdp, DP_CTRL_STAT, SSTICKYERR);
+	if (retval != ERROR_OK)
+		return retval;
+
+	retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &dummy);
+	if (retval != ERROR_OK)
+		return retval;
 
 	swjdp->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ;
+	retval = dap_queue_dp_write(swjdp, DP_CTRL_STAT, swjdp->dp_ctrl_stat);
+	if (retval != ERROR_OK)
+		return retval;
 
-	dap_dp_write_reg(swjdp, swjdp->dp_ctrl_stat, DP_CTRL_STAT);
-	dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
-	if ((retval = jtag_execute_queue()) != ERROR_OK)
+	retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &ctrlstat);
+	if (retval != ERROR_OK)
+		return retval;
+	if ((retval = dap_run(swjdp)) != ERROR_OK)
 		return retval;
 
 	/* Check that we have debug power domains activated */
 	while (!(ctrlstat & CDBGPWRUPACK) && (cnt++ < 10))
 	{
 		LOG_DEBUG("DAP: wait CDBGPWRUPACK");
-		dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
-		if ((retval = jtag_execute_queue()) != ERROR_OK)
+		retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &ctrlstat);
+		if (retval != ERROR_OK)
+			return retval;
+		if ((retval = dap_run(swjdp)) != ERROR_OK)
 			return retval;
 		alive_sleep(10);
 	}
@@ -1171,17 +938,25 @@ int ahbap_debugport_init(struct swjdp_common *swjdp)
 	while (!(ctrlstat & CSYSPWRUPACK) && (cnt++ < 10))
 	{
 		LOG_DEBUG("DAP: wait CSYSPWRUPACK");
-		dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT);
-		if ((retval = jtag_execute_queue()) != ERROR_OK)
+		retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &ctrlstat);
+		if (retval != ERROR_OK)
+			return retval;
+		if ((retval = dap_run(swjdp)) != ERROR_OK)
 			return retval;
 		alive_sleep(10);
 	}
 
-	dap_dp_read_reg(swjdp, &dummy, DP_CTRL_STAT);
+	retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &dummy);
+	if (retval != ERROR_OK)
+		return retval;
 	/* With debug power on we can activate OVERRUN checking */
 	swjdp->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ | CORUNDETECT;
-	dap_dp_write_reg(swjdp, swjdp->dp_ctrl_stat, DP_CTRL_STAT);
-	dap_dp_read_reg(swjdp, &dummy, DP_CTRL_STAT);
+	retval = dap_queue_dp_write(swjdp, DP_CTRL_STAT, swjdp->dp_ctrl_stat);
+	if (retval != ERROR_OK)
+		return retval;
+	retval = dap_queue_dp_read(swjdp, DP_CTRL_STAT, &dummy);
+	if (retval != ERROR_OK)
+		return retval;
 
 	/*
 	 * REVISIT this isn't actually *initializing* anything in an AP,
@@ -1189,8 +964,8 @@ int ahbap_debugport_init(struct swjdp_common *swjdp)
 	 * Should it?  If the ROM address is valid, is this the right
 	 * place to scan the table and do any topology detection?
 	 */
-	dap_ap_read_reg_u32(swjdp, AP_REG_IDR, &idreg);
-	dap_ap_read_reg_u32(swjdp, AP_REG_BASE, &romaddr);
+	retval = dap_queue_ap_read(swjdp, AP_REG_IDR, &idreg);
+	retval = dap_queue_ap_read(swjdp, AP_REG_BASE, &romaddr);
 
 	LOG_DEBUG("MEM-AP #%d ID Register 0x%" PRIx32
 		", Debug ROM Address 0x%" PRIx32,
@@ -1217,10 +992,10 @@ is_dap_cid_ok(uint32_t cid3, uint32_t cid2, uint32_t cid1, uint32_t cid0)
 			&& ((cid1 & 0x0f) == 0) && cid0 == 0x0d;
 }
 
-int dap_info_command(struct command_context *cmd_ctx,
-		struct swjdp_common *swjdp, int apsel)
+static int dap_info_command(struct command_context *cmd_ctx,
+		struct adiv5_dap *swjdp, int apsel)
 {
-
+	int retval;
 	uint32_t dbgbase, apid;
 	int romtable_present = 0;
 	uint8_t mem_ap;
@@ -1232,9 +1007,12 @@ int dap_info_command(struct command_context *cmd_ctx,
 
 	apselold = swjdp->apsel;
 	dap_ap_select(swjdp, apsel);
-	dap_ap_read_reg_u32(swjdp, AP_REG_BASE, &dbgbase);
-	dap_ap_read_reg_u32(swjdp, AP_REG_IDR, &apid);
-	jtagdp_transaction_endcheck(swjdp);
+	retval = dap_queue_ap_read(swjdp, AP_REG_BASE, &dbgbase);
+	retval = dap_queue_ap_read(swjdp, AP_REG_IDR, &apid);
+	retval = dap_run(swjdp);
+	if (retval != ERROR_OK)
+		return retval;
+
 	/* Now we read ROM table ID registers, ref. ARM IHI 0029B sec  */
 	mem_ap = ((apid&0x10000) && ((apid&0x0F) != 0));
 	command_print(cmd_ctx, "AP ID register 0x%8.8" PRIx32, apid);
@@ -1286,7 +1064,10 @@ int dap_info_command(struct command_context *cmd_ctx,
 		mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000) | 0xFF8, &cid2);
 		mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000) | 0xFFC, &cid3);
 		mem_ap_read_u32(swjdp, (dbgbase&0xFFFFF000) | 0xFCC, &memtype);
-		jtagdp_transaction_endcheck(swjdp);
+		retval = dap_run(swjdp);
+		if (retval != ERROR_OK)
+			return retval;
+
 		if (!is_dap_cid_ok(cid3, cid2, cid1, cid0))
 			command_print(cmd_ctx, "\tCID3 0x%2.2" PRIx32
 					", CID2 0x%2.2" PRIx32
@@ -1503,10 +1284,6 @@ int dap_info_command(struct command_context *cmd_ctx,
 					type = "TI DAPCTL";
 					full = "";
 					break;
-				case 0x4e0:
-					type = "Cortex-M3 ETM";
-					full = "(Embedded Trace)";
-					break;
 				case 0x906:
 					type = "Coresight CTI";
 					full = "(Cross Trigger)";
@@ -1539,6 +1316,10 @@ int dap_info_command(struct command_context *cmd_ctx,
 					type = "Cortex-M3 TPIU";
 					full = "(Trace Port Interface Unit)";
 					break;
+				case 0x924:
+					type = "Cortex-M3 ETM";
+					full = "(Embedded Trace)";
+					break;
 				case 0xc08:
 					type = "Cortex-A8 Debug";
 					full = "(Debug Unit)";
@@ -1570,15 +1351,40 @@ int dap_info_command(struct command_context *cmd_ctx,
 	return ERROR_OK;
 }
 
-DAP_COMMAND_HANDLER(dap_baseaddr_command)
+COMMAND_HANDLER(handle_dap_info_command)
 {
+	struct target *target = get_current_target(CMD_CTX);
+	struct arm *arm = target_to_arm(target);
+	struct adiv5_dap *dap = arm->dap;
+	uint32_t apsel;
+
+	switch (CMD_ARGC) {
+	case 0:
+		apsel = dap->apsel;
+		break;
+	case 1:
+		COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
+		break;
+	default:
+		return ERROR_COMMAND_SYNTAX_ERROR;
+	}
+
+	return dap_info_command(CMD_CTX, dap, apsel);
+}
+
+COMMAND_HANDLER(dap_baseaddr_command)
+{
+	struct target *target = get_current_target(CMD_CTX);
+	struct arm *arm = target_to_arm(target);
+	struct adiv5_dap *dap = arm->dap;
+
 	uint32_t apsel, apselsave, baseaddr;
 	int retval;
 
-	apselsave = swjdp->apsel;
+	apselsave = dap->apsel;
 	switch (CMD_ARGC) {
 	case 0:
-		apsel = swjdp->apsel;
+		apsel = dap->apsel;
 		break;
 	case 1:
 		COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
@@ -1591,30 +1397,37 @@ DAP_COMMAND_HANDLER(dap_baseaddr_command)
 	}
 
 	if (apselsave != apsel)
-		dap_ap_select(swjdp, apsel);
+		dap_ap_select(dap, apsel);
 
 	/* NOTE:  assumes we're talking to a MEM-AP, which
 	 * has a base address.  There are other kinds of AP,
 	 * though they're not common for now.  This should
 	 * use the ID register to verify it's a MEM-AP.
 	 */
-	dap_ap_read_reg_u32(swjdp, AP_REG_BASE, &baseaddr);
-	retval = jtagdp_transaction_endcheck(swjdp);
+	retval = dap_queue_ap_read(dap, AP_REG_BASE, &baseaddr);
+	retval = dap_run(dap);
+	if (retval != ERROR_OK)
+		return retval;
+
 	command_print(CMD_CTX, "0x%8.8" PRIx32, baseaddr);
 
 	if (apselsave != apsel)
-		dap_ap_select(swjdp, apselsave);
+		dap_ap_select(dap, apselsave);
 
 	return retval;
 }
 
-DAP_COMMAND_HANDLER(dap_memaccess_command)
+COMMAND_HANDLER(dap_memaccess_command)
 {
+	struct target *target = get_current_target(CMD_CTX);
+	struct arm *arm = target_to_arm(target);
+	struct adiv5_dap *dap = arm->dap;
+
 	uint32_t memaccess_tck;
 
 	switch (CMD_ARGC) {
 	case 0:
-		memaccess_tck = swjdp->memaccess_tck;
+		memaccess_tck = dap->memaccess_tck;
 		break;
 	case 1:
 		COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], memaccess_tck);
@@ -1622,16 +1435,20 @@ DAP_COMMAND_HANDLER(dap_memaccess_command)
 	default:
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
-	swjdp->memaccess_tck = memaccess_tck;
+	dap->memaccess_tck = memaccess_tck;
 
 	command_print(CMD_CTX, "memory bus access delay set to %" PRIi32 " tck",
-			swjdp->memaccess_tck);
+			dap->memaccess_tck);
 
 	return ERROR_OK;
 }
 
-DAP_COMMAND_HANDLER(dap_apsel_command)
+COMMAND_HANDLER(dap_apsel_command)
 {
+	struct target *target = get_current_target(CMD_CTX);
+	struct arm *arm = target_to_arm(target);
+	struct adiv5_dap *dap = arm->dap;
+
 	uint32_t apsel, apid;
 	int retval;
 
@@ -1649,24 +1466,31 @@ DAP_COMMAND_HANDLER(dap_apsel_command)
 		return ERROR_COMMAND_SYNTAX_ERROR;
 	}
 
-	dap_ap_select(swjdp, apsel);
-	dap_ap_read_reg_u32(swjdp, AP_REG_IDR, &apid);
-	retval = jtagdp_transaction_endcheck(swjdp);
+	dap_ap_select(dap, apsel);
+	retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid);
+	retval = dap_run(dap);
+	if (retval != ERROR_OK)
+		return retval;
+
 	command_print(CMD_CTX, "ap %" PRIi32 " selected, identification register 0x%8.8" PRIx32,
 			apsel, apid);
 
 	return retval;
 }
 
-DAP_COMMAND_HANDLER(dap_apid_command)
+COMMAND_HANDLER(dap_apid_command)
 {
+	struct target *target = get_current_target(CMD_CTX);
+	struct arm *arm = target_to_arm(target);
+	struct adiv5_dap *dap = arm->dap;
+
 	uint32_t apsel, apselsave, apid;
 	int retval;
 
-	apselsave = swjdp->apsel;
+	apselsave = dap->apsel;
 	switch (CMD_ARGC) {
 	case 0:
-		apsel = swjdp->apsel;
+		apsel = dap->apsel;
 		break;
 	case 1:
 		COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
@@ -1679,13 +1503,130 @@ DAP_COMMAND_HANDLER(dap_apid_command)
 	}
 
 	if (apselsave != apsel)
-		dap_ap_select(swjdp, apsel);
+		dap_ap_select(dap, apsel);
+
+	retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid);
+	retval = dap_run(dap);
+	if (retval != ERROR_OK)
+		return retval;
 
-	dap_ap_read_reg_u32(swjdp, AP_REG_IDR, &apid);
-	retval = jtagdp_transaction_endcheck(swjdp);
 	command_print(CMD_CTX, "0x%8.8" PRIx32, apid);
 	if (apselsave != apsel)
-		dap_ap_select(swjdp, apselsave);
+		dap_ap_select(dap, apselsave);
+
+	return retval;
+}
+
+static const struct command_registration dap_commands[] = {
+	{
+		.name = "info",
+		.handler = handle_dap_info_command,
+		.mode = COMMAND_EXEC,
+		.help = "display ROM table for MEM-AP "
+			"(default currently selected AP)",
+		.usage = "[ap_num]",
+	},
+	{
+		.name = "apsel",
+		.handler = dap_apsel_command,
+		.mode = COMMAND_EXEC,
+		.help = "Set the currently selected AP (default 0) "
+			"and display the result",
+		.usage = "[ap_num]",
+	},
+	{
+		.name = "apid",
+		.handler = dap_apid_command,
+		.mode = COMMAND_EXEC,
+		.help = "return ID register from AP "
+			"(default currently selected AP)",
+		.usage = "[ap_num]",
+	},
+	{
+		.name = "baseaddr",
+		.handler = dap_baseaddr_command,
+		.mode = COMMAND_EXEC,
+		.help = "return debug base address from MEM-AP "
+			"(default currently selected AP)",
+		.usage = "[ap_num]",
+	},
+	{
+		.name = "memaccess",
+		.handler = dap_memaccess_command,
+		.mode = COMMAND_EXEC,
+		.help = "set/get number of extra tck for MEM-AP memory "
+			"bus access [0-255]",
+		.usage = "[cycles]",
+	},
+	COMMAND_REGISTRATION_DONE
+};
+
+const struct command_registration dap_command_handlers[] = {
+	{
+		.name = "dap",
+		.mode = COMMAND_EXEC,
+		.help = "DAP command group",
+		.chain = dap_commands,
+	},
+	COMMAND_REGISTRATION_DONE
+};
+
+
+/*
+ * This represents the bits which must be sent out on TMS/SWDIO to
+ * switch a DAP implemented using an SWJ-DP module into SWD mode.
+ * These bits are stored (and transmitted) LSB-first.
+ *
+ * See the DAP-Lite specification, section 2.2.5 for information
+ * about making the debug link select SWD or JTAG.  (Similar info
+ * is in a few other ARM documents.)
+ */
+static const uint8_t jtag2swd_bitseq[] = {
+	/* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
+	 * putting both JTAG and SWD logic into reset state.
+	 */
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	/* Switching sequence enables SWD and disables JTAG
+	 * NOTE: bits in the DP's IDCODE may expose the need for
+	 * an old/deprecated sequence (0xb6 0xed).
+	 */
+	0x9e, 0xe7,
+	/* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
+	 * putting both JTAG and SWD logic into reset state.
+	 */
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+};
+
+/**
+ * Put the debug link into SWD mode, if the target supports it.
+ * The link's initial mode may be either JTAG (for example,
+ * with SWJ-DP after reset) or SWD.
+ *
+ * @param target Enters SWD mode (if possible).
+ *
+ * Note that targets using the JTAG-DP do not support SWD, and that
+ * some targets which could otherwise support it may have have been
+ * configured to disable SWD signaling
+ *
+ * @return ERROR_OK or else a fault code.
+ */
+int dap_to_swd(struct target *target)
+{
+	int retval;
+
+	LOG_DEBUG("Enter SWD mode");
+
+	/* REVISIT it's nasty to need to make calls to a "jtag"
+	 * subsystem if the link isn't in JTAG mode...
+	 */
+
+	retval =  jtag_add_tms_seq(8 * sizeof(jtag2swd_bitseq),
+			jtag2swd_bitseq, TAP_INVALID);
+	if (retval == ERROR_OK)
+		retval = jtag_execute_queue();
+
+	/* REVISIT set up the DAP's ops vector for SWD mode. */
 
 	return retval;
 }
+