X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm_adi_v5.h;h=2aefd605a69f8a1fd99b709548b63456969e6ac4;hb=dcc9624b980a25248d38e07636f7701a46673b5a;hp=abdbd2480bad41db401c1f484fe95fcf6357b5c9;hpb=45a528ff3c0582f7d22b65d76d925f34a6956957;p=openocd.git

diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index abdbd2480b..2aefd605a6 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -32,15 +32,11 @@
 
 #include "arm_jtag.h"
 
-/* JTAG instructions/registers for JTAG-DP and SWJ-DP */
-#define JTAG_DP_ABORT		0x8
+/* FIXME remove these JTAG-specific decls when mem_ap_read_buf_u32()
+ * is no longer JTAG-specific
+ */
 #define JTAG_DP_DPACC		0xA
 #define JTAG_DP_APACC		0xB
-#define JTAG_DP_IDCODE		0xE
-
-/* three-bit ACK values for DPACC and APACC reads */
-#define JTAG_ACK_OK_FAULT	0x2
-#define JTAG_ACK_WAIT		0x1
 
 /* three-bit ACK values for SWD access (sent LSB first) */
 #define SWD_ACK_OK		0x4
@@ -63,6 +59,9 @@
 #define DP_SELECT		0x8		/* JTAG: r/w; SWD: write */
 #define DP_RDBUFF		0xC		/* read-only */
 
+#define WCR_TO_TRN(wcr) (1 + (3 & ((wcr)) >> 8))	/* 1..4 clocks */
+#define WCR_TO_PRESCALE(wcr) (7 & ((wcr)))		/* impl defined */
+
 /* Fields of the DP's AP ABORT register */
 #define DAPABORT		(1 << 0)
 #define STKCMPCLR		(1 << 1)	/* SWD-only */
@@ -182,7 +181,6 @@ struct adiv5_dap
 	uint32_t	memaccess_tck;
 	/* Size of TAR autoincrement block, ARM ADI Specification requires at least 10 bits */
 	uint32_t tar_autoincr_block;
-
 };
 
 /**
@@ -236,6 +234,7 @@ struct dap_ops {
 static inline int dap_queue_idcode_read(struct adiv5_dap *dap,
 		uint8_t *ack, uint32_t *data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_idcode_read(dap, ack, data);
 }
 
@@ -254,6 +253,7 @@ static inline int dap_queue_idcode_read(struct adiv5_dap *dap,
 static inline int dap_queue_dp_read(struct adiv5_dap *dap,
 		unsigned reg, uint32_t *data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_dp_read(dap, reg, data);
 }
 
@@ -271,6 +271,7 @@ static inline int dap_queue_dp_read(struct adiv5_dap *dap,
 static inline int dap_queue_dp_write(struct adiv5_dap *dap,
 		unsigned reg, uint32_t data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_dp_write(dap, reg, data);
 }
 
@@ -287,6 +288,7 @@ static inline int dap_queue_dp_write(struct adiv5_dap *dap,
 static inline int dap_queue_ap_read(struct adiv5_dap *dap,
 		unsigned reg, uint32_t *data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_ap_read(dap, reg, data);
 }
 
@@ -302,6 +304,7 @@ static inline int dap_queue_ap_read(struct adiv5_dap *dap,
 static inline int dap_queue_ap_write(struct adiv5_dap *dap,
 		unsigned reg, uint32_t data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_ap_write(dap, reg, data);
 }
 
@@ -318,6 +321,7 @@ static inline int dap_queue_ap_write(struct adiv5_dap *dap,
  */
 static inline int dap_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_ap_abort(dap, ack);
 }
 
@@ -333,6 +337,7 @@ static inline int dap_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack)
  */
 static inline int dap_run(struct adiv5_dap *dap)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->run(dap);
 }
 
@@ -374,20 +379,47 @@ int mem_ap_write_buf_u16(struct adiv5_dap *swjdp,
 int mem_ap_write_buf_u32(struct adiv5_dap *swjdp,
 		uint8_t *buffer, int count, uint32_t address);
 
+
+
+/* Queued MEM-AP memory mapped single word transfers with selection of ap */
+int mem_ap_sel_read_u32(struct adiv5_dap *swjdp, uint8_t apsel,
+		uint32_t address, uint32_t *value);
+int mem_ap_sel_write_u32(struct adiv5_dap *swjdp, uint8_t apsel,
+		uint32_t address, uint32_t value);
+
+/* Synchronous MEM-AP memory mapped single word transfers with selection of ap */
+int mem_ap_sel_read_atomic_u32(struct adiv5_dap *swjdp, uint8_t apsel,
+		uint32_t address, uint32_t *value);
+int mem_ap_sel_write_atomic_u32(struct adiv5_dap *swjdp, uint8_t apsel,
+		uint32_t address, uint32_t value);
+
+/* MEM-AP memory mapped bus block transfers with selection of ap*/
+int mem_ap_sel_read_buf_u8(struct adiv5_dap *swjdp, uint8_t apsel,
+		uint8_t *buffer, int count, uint32_t address);
+int mem_ap_sel_read_buf_u16(struct adiv5_dap *swjdp, uint8_t apsel,
+		uint8_t *buffer, int count, uint32_t address);
+int mem_ap_sel_read_buf_u32(struct adiv5_dap *swjdp, uint8_t apsel,
+		uint8_t *buffer, int count, uint32_t address);
+
+int mem_ap_sel_write_buf_u8(struct adiv5_dap *swjdp, uint8_t apsel,
+		uint8_t *buffer, int count, uint32_t address);
+int mem_ap_sel_write_buf_u16(struct adiv5_dap *swjdp, uint8_t apsel,
+		uint8_t *buffer, int count, uint32_t address);
+int mem_ap_sel_write_buf_u32(struct adiv5_dap *swjdp, uint8_t apsel,
+		uint8_t *buffer, int count, uint32_t address);
+
+
+
 /* Initialisation of the debug system, power domains and registers */
 int ahbap_debugport_init(struct adiv5_dap *swjdp);
 
+/* Probe the AP for ROM Table location */
+int dap_get_debugbase(struct adiv5_dap *dap, int apsel,
+			uint32_t *dbgbase, uint32_t *apid);
 
-/* Commands for user dap access */
-int dap_info_command(struct command_context *cmd_ctx,
-		struct adiv5_dap *swjdp, int apsel);
-
-#define DAP_COMMAND_HANDLER(name) \
-		COMMAND_HELPER(name, struct adiv5_dap *swjdp)
-DAP_COMMAND_HANDLER(dap_baseaddr_command);
-DAP_COMMAND_HANDLER(dap_memaccess_command);
-DAP_COMMAND_HANDLER(dap_apsel_command);
-DAP_COMMAND_HANDLER(dap_apid_command);
+/* Lookup CoreSight component */
+int dap_lookup_cs_component(struct adiv5_dap *dap, int apsel,
+			uint32_t dbgbase, uint8_t type, uint32_t *addr);
 
 struct target;
 
@@ -397,4 +429,6 @@ int dap_to_swd(struct target *target);
 /* Put debug link into JTAG mode */
 int dap_to_jtag(struct target *target);
 
+extern const struct command_registration dap_command_handlers[];
+
 #endif