X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm_adi_v5.h;h=37b7771231b2fa70d65dbbad796d55ec83a4e03b;hb=24c0f9470a77e3396102272b041810b45baba47b;hp=27a2f2f8a907b7e836f5b669b1d33f4d8ee21b16;hpb=0649fb2f6c7e1bea138769ecc2ec8dc17ae98044;p=openocd.git diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h index 27a2f2f8a9..37b7771231 100644 --- a/src/target/arm_adi_v5.h +++ b/src/target/arm_adi_v5.h @@ -20,6 +20,7 @@ * Free Software Foundation, Inc., * * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * ***************************************************************************/ + #ifndef ARM_ADI_V5_H #define ARM_ADI_V5_H @@ -59,6 +60,9 @@ #define DP_SELECT 0x8 /* JTAG: r/w; SWD: write */ #define DP_RDBUFF 0xC /* read-only */ +#define WCR_TO_TRN(wcr) (1 + (3 & ((wcr)) >> 8)) /* 1..4 clocks */ +#define WCR_TO_PRESCALE(wcr) (7 & ((wcr))) /* impl defined */ + /* Fields of the DP's AP ABORT register */ #define DAPABORT (1 << 0) #define STKCMPCLR (1 << 1) /* SWD-only */ @@ -130,21 +134,22 @@ * as part of setting up a debug session (if all the dual-role JTAG/SWD * signals are available). */ -struct adiv5_dap -{ +struct adiv5_dap { const struct dap_ops *ops; struct arm_jtag *jtag_info; /* Control config */ uint32_t dp_ctrl_stat; + uint32_t apsel; + /** * Cache for DP_SELECT bits identifying the current AP. A DAP may * connect to multiple APs, such as one MEM-AP for general access, * another reserved for accessing debug modules, and a JTAG-DP. * "-1" indicates no cached value. */ - uint32_t apsel; + uint32_t ap_current; /** * Cache for DP_SELECT bits identifying the current four-word AP @@ -176,6 +181,7 @@ struct adiv5_dap * MEM-AP access before we try to read its status (and/or result). */ uint32_t memaccess_tck; + /* Size of TAR autoincrement block, ARM ADI Specification requires at least 10 bits */ uint32_t tar_autoincr_block; }; @@ -210,6 +216,7 @@ struct dap_ops { /** AP register write. */ int (*queue_ap_write)(struct adiv5_dap *dap, unsigned reg, uint32_t data); + /** AP operation abort. */ int (*queue_ap_abort)(struct adiv5_dap *dap, uint8_t *ack); @@ -243,7 +250,7 @@ static inline int dap_queue_idcode_read(struct adiv5_dap *dap, * @param dap The DAP used for reading. * @param reg The two-bit number of the DP register being read. * @param data Pointer saying where to store the register's value - * (in host endianness). + * (in host endianness). * * @return ERROR_OK for success, else a fault code. */ @@ -278,7 +285,7 @@ static inline int dap_queue_dp_write(struct adiv5_dap *dap, * @param dap The DAP used for reading. * @param reg The number of the AP register being read. * @param data Pointer saying where to store the register's value - * (in host endianness). + * (in host endianness). * * @return ERROR_OK for success, else a fault code. */ @@ -341,11 +348,11 @@ static inline int dap_run(struct adiv5_dap *dap) /** Accessor for currently selected DAP-AP number (0..255) */ static inline uint8_t dap_ap_get_select(struct adiv5_dap *swjdp) { - return (uint8_t)(swjdp ->apsel >> 24); + return (uint8_t)(swjdp->ap_current >> 24); } /* AP selection applies to future AP transactions */ -void dap_ap_select(struct adiv5_dap *dap,uint8_t apsel); +void dap_ap_select(struct adiv5_dap *dap, uint8_t ap); /* Queued AP transactions */ int dap_setup_accessport(struct adiv5_dap *swjdp, @@ -370,19 +377,50 @@ int mem_ap_read_buf_u32(struct adiv5_dap *swjdp, uint8_t *buffer, int count, uint32_t address); int mem_ap_write_buf_u8(struct adiv5_dap *swjdp, - uint8_t *buffer, int count, uint32_t address); + const uint8_t *buffer, int count, uint32_t address); int mem_ap_write_buf_u16(struct adiv5_dap *swjdp, - uint8_t *buffer, int count, uint32_t address); + const uint8_t *buffer, int count, uint32_t address); int mem_ap_write_buf_u32(struct adiv5_dap *swjdp, + const uint8_t *buffer, int count, uint32_t address); + +/* Queued MEM-AP memory mapped single word transfers with selection of ap */ +int mem_ap_sel_read_u32(struct adiv5_dap *swjdp, uint8_t ap, + uint32_t address, uint32_t *value); +int mem_ap_sel_write_u32(struct adiv5_dap *swjdp, uint8_t ap, + uint32_t address, uint32_t value); + +/* Synchronous MEM-AP memory mapped single word transfers with selection of ap */ +int mem_ap_sel_read_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap, + uint32_t address, uint32_t *value); +int mem_ap_sel_write_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap, + uint32_t address, uint32_t value); + +/* MEM-AP memory mapped bus block transfers with selection of ap */ +int mem_ap_sel_read_buf_u8(struct adiv5_dap *swjdp, uint8_t ap, + uint8_t *buffer, int count, uint32_t address); +int mem_ap_sel_read_buf_u16(struct adiv5_dap *swjdp, uint8_t ap, + uint8_t *buffer, int count, uint32_t address); +int mem_ap_sel_read_buf_u32(struct adiv5_dap *swjdp, uint8_t ap, uint8_t *buffer, int count, uint32_t address); +int mem_ap_sel_write_buf_u8(struct adiv5_dap *swjdp, uint8_t ap, + const uint8_t *buffer, int count, uint32_t address); +int mem_ap_sel_write_buf_u16(struct adiv5_dap *swjdp, uint8_t ap, + const uint8_t *buffer, int count, uint32_t address); +int mem_ap_sel_write_buf_u32(struct adiv5_dap *swjdp, uint8_t ap, + const uint8_t *buffer, int count, uint32_t address); + /* Initialisation of the debug system, power domains and registers */ int ahbap_debugport_init(struct adiv5_dap *swjdp); /* Probe the AP for ROM Table location */ -int dap_get_debugbase(struct adiv5_dap *dap, int apsel, +int dap_get_debugbase(struct adiv5_dap *dap, int ap, uint32_t *dbgbase, uint32_t *apid); +/* Lookup CoreSight component */ +int dap_lookup_cs_component(struct adiv5_dap *dap, int ap, + uint32_t dbgbase, uint8_t type, uint32_t *addr); + struct target; /* Put debug link into SWD mode */