X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm_disassembler.h;h=e9f4d44cbb7066822483029bd7f5b129302f942c;hb=a4d50544de07f13e3f9644d2b48e41ebdc91a7a3;hp=07564d6d8f216e288cb7ec7cf10541f074dc2ece;hpb=7bfcc10839d2a9190cb7ae9fae02280e643b3450;p=openocd.git diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h index 07564d6d8f..e9f4d44cbb 100644 --- a/src/target/arm_disassembler.h +++ b/src/target/arm_disassembler.h @@ -13,13 +13,11 @@ * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + * along with this program. If not, see . * ***************************************************************************/ -#ifndef ARM_DISASSEMBLER_H -#define ARM_DISASSEMBLER_H +#ifndef OPENOCD_TARGET_ARM_DISASSEMBLER_H +#define OPENOCD_TARGET_ARM_DISASSEMBLER_H enum arm_instruction_type { ARM_UNKNOWN_INSTUCTION, @@ -84,9 +82,14 @@ enum arm_instruction_type { /* Miscellaneous instructions */ ARM_CLZ, + /* Exception return instructions */ + ARM_ERET, + /* Exception generating instructions */ ARM_BKPT, ARM_SWI, + ARM_HVC, + ARM_SMC, /* Coprocessor instructions */ ARM_CDP, @@ -103,6 +106,8 @@ enum arm_instruction_type { ARM_MCRR, ARM_MRRC, ARM_PLD, + ARM_DSB, + ARM_ISB, ARM_QADD, ARM_QDADD, ARM_QSUB, @@ -198,4 +203,4 @@ int arm_access_size(struct arm_instruction *instruction); #define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000) >> 28]) -#endif /* ARM_DISASSEMBLER_H */ +#endif /* OPENOCD_TARGET_ARM_DISASSEMBLER_H */