X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farmv7a.c;h=db72afd2128dced727c0789226d038c75b93a0a3;hb=779e95cc326e77f628d5feb7d72a064ffedfd820;hp=92a373aeefd8aa286128f6adccf9dbc23d6d9f81;hpb=45a528ff3c0582f7d22b65d76d925f34a6956957;p=openocd.git
diff --git a/src/target/armv7a.c b/src/target/armv7a.c
index 92a373aeef..db72afd212 100644
--- a/src/target/armv7a.c
+++ b/src/target/armv7a.c
@@ -1,6 +1,8 @@
/***************************************************************************
* Copyright (C) 2009 by David Brownell *
* *
+ * Copyright (C) ST-Ericsson SA 2011 michel.jaouen@stericsson.com *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
@@ -12,10 +14,9 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * along with this program. If not, see . *
***************************************************************************/
+
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
@@ -34,13 +35,14 @@
#include
#include "arm_opcodes.h"
-
+#include "target.h"
+#include "target_type.h"
static void armv7a_show_fault_registers(struct target *target)
{
uint32_t dfsr, ifsr, dfar, ifar;
struct armv7a_common *armv7a = target_to_armv7a(target);
- struct arm_dpm *dpm = armv7a->armv4_5_common.dpm;
+ struct arm_dpm *dpm = armv7a->arm.dpm;
int retval;
retval = dpm->prepare(dpm);
@@ -76,157 +78,721 @@ static void armv7a_show_fault_registers(struct target *target)
goto done;
LOG_USER("Data fault registers DFSR: %8.8" PRIx32
- ", DFAR: %8.8" PRIx32, dfsr, dfar);
+ ", DFAR: %8.8" PRIx32, dfsr, dfar);
LOG_USER("Instruction fault registers IFSR: %8.8" PRIx32
- ", IFAR: %8.8" PRIx32, ifsr, ifar);
+ ", IFAR: %8.8" PRIx32, ifsr, ifar);
done:
/* (void) */ dpm->finish(dpm);
}
-int armv7a_arch_state(struct target *target)
+
+/* retrieve main id register */
+static int armv7a_read_midr(struct target *target)
{
- static const char *state[] =
- {
- "disabled", "enabled"
- };
+ int retval = ERROR_FAIL;
+ struct armv7a_common *armv7a = target_to_armv7a(target);
+ struct arm_dpm *dpm = armv7a->arm.dpm;
+ uint32_t midr;
+ retval = dpm->prepare(dpm);
+ if (retval != ERROR_OK)
+ goto done;
+ /* MRC p15,0,,c0,c0,0; read main id register*/
+ retval = dpm->instr_read_data_r0(dpm,
+ ARMV4_5_MRC(15, 0, 0, 0, 0, 0),
+ &midr);
+ if (retval != ERROR_OK)
+ goto done;
+
+ armv7a->rev = (midr & 0xf);
+ armv7a->partnum = (midr >> 4) & 0xfff;
+ armv7a->arch = (midr >> 16) & 0xf;
+ armv7a->variant = (midr >> 20) & 0xf;
+ armv7a->implementor = (midr >> 24) & 0xff;
+ LOG_INFO("%s rev %" PRIx32 ", partnum %" PRIx32 ", arch %" PRIx32
+ ", variant %" PRIx32 ", implementor %" PRIx32,
+ target->cmd_name,
+ armv7a->rev,
+ armv7a->partnum,
+ armv7a->arch,
+ armv7a->variant,
+ armv7a->implementor);
+
+done:
+ dpm->finish(dpm);
+ return retval;
+}
+
+static int armv7a_read_ttbcr(struct target *target)
+{
struct armv7a_common *armv7a = target_to_armv7a(target);
- struct arm *armv4_5 = &armv7a->armv4_5_common;
+ struct arm_dpm *dpm = armv7a->arm.dpm;
+ uint32_t ttbcr, ttbcr_n;
+ int retval = dpm->prepare(dpm);
+ if (retval != ERROR_OK)
+ goto done;
+ /* MRC p15,0,