X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farmv7a.h;h=cb7eb01ff838ad21b35effb6a111e70fd835ce71;hb=a6c4eb03455f6e97fc25183aae249d6ccdcbfb0f;hp=575363d1fdc17f8b1feaa5e0bd8466caaa30c66e;hpb=13288a44bee0aa26067cb51c262b82a12b61699f;p=openocd.git diff --git a/src/target/armv7a.h b/src/target/armv7a.h index 575363d1fd..cb7eb01ff8 100644 --- a/src/target/armv7a.h +++ b/src/target/armv7a.h @@ -14,13 +14,14 @@ * You should have received a copy of the GNU General Public License * * along with this program; if not, write to the * * Free Software Foundation, Inc., * - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * ***************************************************************************/ #ifndef ARMV7A_H #define ARMV7A_H #include "arm_adi_v5.h" +#include "armv7a_cache.h" #include "arm.h" #include "armv4_5_mmu.h" #include "armv4_5_cache.h" @@ -62,24 +63,35 @@ struct armv7a_cachesize { uint32_t way_shift; }; -struct armv7a_cache_common { - int ctype; +/* information about one architecture cache at any level */ +struct armv7a_arch_cache { + int ctype; /* cache type, CLIDR encoding */ struct armv7a_cachesize d_u_size; /* data cache */ struct armv7a_cachesize i_size; /* instruction cache */ +}; + +/* common cache information */ +struct armv7a_cache_common { + int info; /* -1 invalid, else valid */ + int loc; /* level of coherency */ + uint32_t dminline; /* minimum d-cache linelen */ + uint32_t iminline; /* minimum i-cache linelen */ + struct armv7a_arch_cache arch[6]; /* cache info, L1 - L7 */ int i_cache_enabled; int d_u_cache_enabled; - /* l2 external unified cache if some */ - void *l2_cache; + int auto_cache_enabled; /* openocd automatic + * cache handling */ + /* outer unified cache if some */ + void *outer_cache; int (*flush_all_data_cache)(struct target *target); - int (*display_cache_info)(struct command_context *cmd_ctx, - struct armv7a_cache_common *armv7a_cache); }; struct armv7a_mmu_common { /* following field mmu working way */ - int32_t ttbr1_used; /* -1 not initialized, 0 no ttbr1 1 ttbr1 used and */ - uint32_t ttbr0_mask;/* masked to be used */ - uint32_t os_border; + int32_t cached; /* 0: not initialized, 1: initialized */ + uint32_t ttbcr; /* cache for ttbcr register */ + uint32_t ttbr_mask[2]; + uint32_t ttbr_range[2]; int (*read_physical_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); @@ -92,8 +104,6 @@ struct armv7a_common { int common_magic; struct reg_cache *core_cache; - struct adiv5_dap dap; - /* Core Debug Unit */ struct arm_dpm dpm; uint32_t debug_base; @@ -105,6 +115,11 @@ struct armv7a_common { uint8_t cluster_id; uint8_t cpu_id; bool is_armv7r; + uint32_t rev; + uint32_t partnum; + uint32_t arch; + uint32_t variant; + uint32_t implementor; /* cache specific to V7 Memory Management Unit compatible with v4_5*/ struct armv7a_mmu_common armv7a_mmu; @@ -154,6 +169,7 @@ target_to_armv7a(struct target *target) /* See ARMv7a arch spec section C10.7 */ #define CPUDBG_DSCCR 0x028 +#define CPUDBG_DSMCR 0x02C /* See ARMv7a arch spec section C10.8 */ #define CPUDBG_AUTHSTATUS 0xFB8