X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farmv7a.h;h=f089c5c5e83bc12e96b4f229414f66e9c89c99a2;hb=1527272fb21beee7839335ea5587e879163d2ed1;hp=2bd261aabdc7d9120263a4df5a5a6ff701ddc605;hpb=0c1bc6703cc76b61d352477af9a796dcab28adcd;p=openocd.git

diff --git a/src/target/armv7a.h b/src/target/armv7a.h
index 2bd261aabd..f089c5c5e8 100644
--- a/src/target/armv7a.h
+++ b/src/target/armv7a.h
@@ -20,10 +20,10 @@
 #define ARMV7A_H
 
 #include <target/arm_adi_v5.h>
-#include "armv4_5.h"
-#include "armv4_5_mmu.h"
-#include "armv4_5_cache.h"
-#include "arm_dpm.h"
+#include <target/armv4_5.h>
+#include <target/armv4_5_mmu.h>
+#include <target/armv4_5_cache.h>
+#include <target/arm_dpm.h>
 
 enum
 {
@@ -114,16 +114,6 @@ target_to_armv7a(struct target *target)
 /* See ARMv7a arch spec section C10.8 */
 #define CPUDBG_AUTHSTATUS	0xFB8
 
-/* DSCR bit numbers (See ARMv7a arch spec section 12.4.5) */
-#define DSCR_CORE_HALTED	0
-#define DSCR_CORE_RESTARTED	1
-#define DSCR_EXT_INT_EN		13
-#define DSCR_HALT_DBG_MODE	14
-#define DSCR_MON_DBG_MODE	15
-#define DSCR_INSTR_COMP		24
-#define DSCR_DTR_TX_FULL	29
-#define DSCR_DTR_RX_FULL	30
-
 struct armv7a_algorithm
 {
 	int common_magic;