X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farmv7m.c;h=0a51ad4d60c3c2b69d0700a5ac0e1c41aef46133;hb=fed329feec985b74961f5209c824ba3ca618eea7;hp=2bcb8abae0e050eb5bf973556b2633f2a62c1a7e;hpb=5d9de1c40090d81288adc85d06c734984b2c5de1;p=openocd.git diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 2bcb8abae0..0a51ad4d60 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -44,6 +44,8 @@ #include "algorithm.h" #include "register.h" #include "semihosting_common.h" +#include +#include #if 0 #define _DEBUG_INSTRUCTION_EXECUTION_ @@ -249,7 +251,7 @@ static int armv7m_set_core_reg(struct reg *reg, uint8_t *buf) return ERROR_OK; } -static uint32_t armv7m_map_id_to_regsel(unsigned int arm_reg_id) +uint32_t armv7m_map_id_to_regsel(unsigned int arm_reg_id) { switch (arm_reg_id) { case ARMV7M_R0 ... ARMV7M_R14: @@ -287,7 +289,7 @@ static uint32_t armv7m_map_id_to_regsel(unsigned int arm_reg_id) } } -static bool armv7m_map_reg_packing(unsigned int arm_reg_id, +bool armv7m_map_reg_packing(unsigned int arm_reg_id, unsigned int *reg32_id, uint32_t *offset) { @@ -329,11 +331,17 @@ static int armv7m_read_core_reg(struct target *target, struct reg *r, if (r->size <= 8) { /* any 8-bit or shorter register is packed */ - uint32_t offset = 0; /* silence false gcc warning */ + uint32_t offset; unsigned int reg32_id; bool is_packed = armv7m_map_reg_packing(num, ®32_id, &offset); - assert(is_packed); + if (!is_packed) { + /* We should not get here as all 8-bit or shorter registers + * are packed */ + assert(false); + /* assert() does nothing if NDEBUG is defined */ + return ERROR_FAIL; + } struct reg *r32 = &armv7m->arm.core_cache->reg_list[reg32_id]; /* Read 32-bit container register if not cached */ @@ -394,11 +402,17 @@ static int armv7m_write_core_reg(struct target *target, struct reg *r, if (r->size <= 8) { /* any 8-bit or shorter register is packed */ - uint32_t offset = 0; /* silence false gcc warning */ + uint32_t offset; unsigned int reg32_id; bool is_packed = armv7m_map_reg_packing(num, ®32_id, &offset); - assert(is_packed); + if (!is_packed) { + /* We should not get here as all 8-bit or shorter registers + * are packed */ + assert(false); + /* assert() does nothing if NDEBUG is defined */ + return ERROR_FAIL; + } struct reg *r32 = &armv7m->arm.core_cache->reg_list[reg32_id]; if (!r32->valid) { @@ -462,7 +476,7 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], size = ARMV7M_NUM_CORE_REGS; *reg_list = malloc(sizeof(struct reg *) * size); - if (*reg_list == NULL) + if (!*reg_list) return ERROR_FAIL; for (i = 0; i < size; i++) @@ -547,7 +561,7 @@ int armv7m_start_algorithm(struct target *target, continue; struct reg *reg = - register_get_by_name(armv7m->arm.core_cache, reg_params[i].reg_name, 0); + register_get_by_name(armv7m->arm.core_cache, reg_params[i].reg_name, false); /* uint32_t regvalue; */ if (!reg) { @@ -663,7 +677,7 @@ int armv7m_wait_algorithm(struct target *target, if (reg_params[i].direction != PARAM_OUT) { struct reg *reg = register_get_by_name(armv7m->arm.core_cache, reg_params[i].reg_name, - 0); + false); if (!reg) { LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name); @@ -955,7 +969,7 @@ int armv7m_blank_check_memory(struct target *target, blocks_to_check = num_blocks; struct algo_block *params = malloc((blocks_to_check+1)*sizeof(struct algo_block)); - if (params == NULL) { + if (!params) { retval = ERROR_FAIL; goto cleanup1; }