X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farmv8.c;h=1b8e450164c0fac0b027cd451b35fac505900d38;hb=fa86553e76ebf6285d5b580a08bfbecdd9ec38c1;hp=00ab6ed1288d180804e529f3b483bd1ab7dbadf9;hpb=095ff3d2103f9e8089b5b1fb0816d43874014e08;p=openocd.git

diff --git a/src/target/armv8.c b/src/target/armv8.c
index 00ab6ed128..1b8e450164 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -37,8 +37,6 @@
 #include "target.h"
 #include "target_type.h"
 
-#define __unused __attribute__((unused))
-
 static const char * const armv8_state_strings[] = {
 	"AArch32", "Thumb", "Jazelle", "ThumbEE", "AArch64",
 };
@@ -47,8 +45,6 @@ static const struct {
 	const char *name;
 	unsigned psr;
 } armv8_mode_data[] = {
-	/* These special modes are currently only supported
-	 * by ARMv6M and ARMv7M profiles */
 	{
 		.name = "USR",
 		.psr = ARM_MODE_USR,
@@ -114,48 +110,6 @@ const char *armv8_mode_name(unsigned psr_mode)
 	return "UNRECOGNIZED";
 }
 
-int armv8_mode_to_number(enum arm_mode mode)
-{
-	switch (mode) {
-		case ARM_MODE_ANY:
-		/* map MODE_ANY to user mode */
-		case ARM_MODE_USR:
-			return 0;
-		case ARM_MODE_FIQ:
-			return 1;
-		case ARM_MODE_IRQ:
-			return 2;
-		case ARM_MODE_SVC:
-			return 3;
-		case ARM_MODE_ABT:
-			return 4;
-		case ARM_MODE_UND:
-			return 5;
-		case ARM_MODE_SYS:
-			return 6;
-		case ARM_MODE_MON:
-			return 7;
-		case ARMV8_64_EL0T:
-			return 8;
-		case ARMV8_64_EL1T:
-			return 9;
-		case ARMV8_64_EL1H:
-			return 10;
-		case ARMV8_64_EL2T:
-			return 11;
-		case ARMV8_64_EL2H:
-			return 12;
-		case ARMV8_64_EL3T:
-			return 13;
-		case ARMV8_64_EL3H:
-			return 14;
-
-		default:
-			LOG_ERROR("invalid mode value encountered %d", mode);
-			return -1;
-	}
-}
-
 static int armv8_read_reg(struct armv8_common *armv8, int regnum, uint64_t *regval)
 {
 	struct arm_dpm *dpm = &armv8->dpm;
@@ -408,8 +362,7 @@ static int armv8_write_reg32(struct armv8_common *armv8, int regnum, uint64_t va
 		break;
 	case ARMV8_SP:
 		retval = dpm->instr_write_data_dcc(dpm,
-			ARMV4_5_MRC(14, 0, 13, 0, 5, 0),
-			value);
+				ARMV4_5_MRC(14, 0, 13, 0, 5, 0), value);
 			break;
 	case ARMV8_PC:/* PC
 		 * read r0 from DCC; then "MOV pc, r0" */
@@ -505,10 +458,9 @@ int armv8_read_mpidr(struct armv8_common *armv8)
 		LOG_INFO("%s cluster %x core %x %s", target_name(armv8->arm.target),
 			armv8->cluster_id,
 			armv8->cpu_id,
-			armv8->multi_processor_system == 0 ? "multi core" : "mono core");
-
+			armv8->multi_processor_system == 0 ? "multi core" : "single core");
 	} else
-		LOG_ERROR("mpdir not in multiprocessor format");
+		LOG_ERROR("mpidr not in multiprocessor format");
 
 done:
 	dpm->finish(dpm);
@@ -537,9 +489,8 @@ void armv8_set_cpsr(struct arm *arm, uint32_t cpsr)
 	/* Older ARMs won't have the J bit */
 	enum arm_state state = 0xFF;
 
-	if (((cpsr & 0x10) >> 4) == 0) {
-		state = ARM_STATE_AARCH64;
-	} else {
+	if ((cpsr & 0x10) != 0) {
+		/* Aarch32 state */
 		if (cpsr & (1 << 5)) {	/* T */
 			if (cpsr & (1 << 24)) { /* J */
 				LOG_WARNING("ThumbEE -- incomplete support");
@@ -553,12 +504,13 @@ void armv8_set_cpsr(struct arm *arm, uint32_t cpsr)
 			} else
 				state = ARM_STATE_ARM;
 		}
+	} else {
+		/* Aarch64 state */
+		state = ARM_STATE_AARCH64;
 	}
+
 	arm->core_state = state;
-	if (arm->core_state == ARM_STATE_AARCH64)
-		arm->core_mode = (mode << 4) | 0xf;
-	else
-		arm->core_mode = mode;
+	arm->core_mode = mode;
 
 	LOG_DEBUG("set CPSR %#8.8x: %s mode, %s state", (unsigned) cpsr,
 		armv8_mode_name(arm->core_mode),
@@ -612,7 +564,7 @@ done:
 	/* (void) */ dpm->finish(dpm);
 }
 
-static void armv8_show_fault_registers(struct target *target)
+static __attribute__((unused)) void armv8_show_fault_registers(struct target *target)
 {
 	struct armv8_common *armv8 = target_to_armv8(target);
 
@@ -649,7 +601,7 @@ static uint8_t armv8_pa_size(uint32_t ps)
 	return ret;
 }
 
-static __unused int armv8_read_ttbcr32(struct target *target)
+static __attribute__((unused)) int armv8_read_ttbcr32(struct target *target)
 {
 	struct armv8_common *armv8 = target_to_armv8(target);
 	struct arm_dpm *dpm = armv8->arm.dpm;
@@ -688,7 +640,7 @@ done:
 	return retval;
 }
 
-static __unused int armv8_read_ttbcr(struct target *target)
+static __attribute__((unused)) int armv8_read_ttbcr(struct target *target)
 {
 	struct armv8_common *armv8 = target_to_armv8(target);
 	struct arm_dpm *dpm = armv8->arm.dpm;
@@ -833,9 +785,6 @@ int armv8_mmu_translate_va_pa(struct target *target, target_addr_t va,
 
 	dpm->finish(dpm);
 
-	if (retval != ERROR_OK)
-		return retval;
-
 	if (retval != ERROR_OK)
 		return retval;
 
@@ -1292,3 +1241,24 @@ int armv8_get_gdb_reg_list(struct target *target,
 		}
 	}
 }
+
+int armv8_set_dbgreg_bits(struct armv8_common *armv8, unsigned int reg, unsigned long mask, unsigned long value)
+{
+	uint32_t tmp;
+
+	/* Read register */
+	int retval = mem_ap_read_atomic_u32(armv8->debug_ap,
+			armv8->debug_base + reg, &tmp);
+	if (ERROR_OK != retval)
+		return retval;
+
+	/* clear bitfield */
+	tmp &= ~mask;
+	/* put new value */
+	tmp |= value & mask;
+
+	/* write new value */
+	retval = mem_ap_write_atomic_u32(armv8->debug_ap,
+			armv8->debug_base + reg, tmp);
+	return retval;
+}