X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fcortex_a8.h;h=393a3104b9c0744aaac2613bac4f8a79ea21d2cd;hb=6030f2ca03abcb934ce5b75be898ef74a0e89be0;hp=869a6f5a3e172c07e82f1f6b8c2f0b47196e32f3;hpb=e9974316027097ff7984924676d70d33b7b674ed;p=openocd.git diff --git a/src/target/cortex_a8.h b/src/target/cortex_a8.h index 869a6f5a3e..393a3104b9 100644 --- a/src/target/cortex_a8.h +++ b/src/target/cortex_a8.h @@ -29,10 +29,7 @@ #ifndef CORTEX_A8_H #define CORTEX_A8_H -#include "register.h" -#include "target.h" #include "armv7a.h" -#include "arm7_9_common.h" extern char* cortex_a8_state_strings[]; @@ -82,28 +79,28 @@ extern char* cortex_a8_state_strings[]; #define DSCR_DTR_TX_FULL 29 #define DSCR_DTR_RX_FULL 30 -typedef struct cortex_a8_brp_s +struct cortex_a8_brp { int used; int type; uint32_t value; uint32_t control; uint8_t BRPn; -} cortex_a8_brp_t; +}; -typedef struct cortex_a8_wrp_s +struct cortex_a8_wrp { int used; int type; uint32_t value; uint32_t control; uint8_t WRPn; -} cortex_a8_wrp_t; +}; -typedef struct cortex_a8_common_s +struct cortex_a8_common { int common_magic; - arm_jtag_t jtag_info; + struct arm_jtag jtag_info; /* Context information */ uint32_t cpudbg_dscr; @@ -119,12 +116,12 @@ typedef struct cortex_a8_common_s int brp_num; int brp_num_available; // int brp_enabled; - cortex_a8_brp_t *brp_list; + struct cortex_a8_brp *brp_list; /* Watchpoint register pairs */ int wrp_num; int wrp_num_available; - cortex_a8_wrp_t *wrp_list; + struct cortex_a8_wrp *wrp_list; /* Interrupts */ int intlinesnum; @@ -133,17 +130,17 @@ typedef struct cortex_a8_common_s /* Use cortex_a8_read_regs_through_mem for fast register reads */ int fast_reg_read; - armv7a_common_t armv7a_common; -} cortex_a8_common_t; + struct armv7a_common armv7a_common; +}; -static inline struct cortex_a8_common_s * -target_to_cortex_a8(struct target_s *target) +static inline struct cortex_a8_common * +target_to_cortex_a8(struct target *target) { - return container_of(target->arch_info, struct cortex_a8_common_s, + return container_of(target->arch_info, struct cortex_a8_common, armv7a_common.armv4_5_common); } -int cortex_a8_init_arch_info(target_t *target, - cortex_a8_common_t *cortex_a8, jtag_tap_t *tap); +int cortex_a8_init_arch_info(struct target *target, + struct cortex_a8_common *cortex_a8, struct jtag_tap *tap); #endif /* CORTEX_A8_H */