X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fcortex_m.h;h=94a30f1a69b36d2d61b0a455d2070210a9f5de2d;hb=a6c4eb03455f6e97fc25183aae249d6ccdcbfb0f;hp=8a284bd9887f8ff90544e8b587fdbd667f15092e;hpb=1c975fe30b8fb380907133462cc38a0b2e9de565;p=openocd.git diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h index 8a284bd988..94a30f1a69 100644 --- a/src/target/cortex_m.h +++ b/src/target/cortex_m.h @@ -33,10 +33,11 @@ #define SYSTEM_CONTROL_BASE 0x400FE000 -#define ITM_TER 0xE0000E00 +#define ITM_TER0 0xE0000E00 #define ITM_TPR 0xE0000E40 #define ITM_TCR 0xE0000E80 #define ITM_LAR 0xE0000FB0 +#define ITM_LAR_KEY 0xC5ACCE55 #define CPUID 0xE000ED00 /* Debug Control Block */ @@ -69,13 +70,13 @@ #define FPU_FPCAR 0xE000EF38 #define FPU_FPDSCR 0xE000EF3C -#define TPI_SSPSR 0xE0040000 -#define TPI_CSPSR 0xE0040004 -#define TPI_ACPR 0xE0040010 -#define TPI_SPPR 0xE00400F0 -#define TPI_FFSR 0xE0040300 -#define TPI_FFCR 0xE0040304 -#define TPI_FSCR 0xE0040308 +#define TPIU_SSPSR 0xE0040000 +#define TPIU_CSPSR 0xE0040004 +#define TPIU_ACPR 0xE0040010 +#define TPIU_SPPR 0xE00400F0 +#define TPIU_FFSR 0xE0040300 +#define TPIU_FFCR 0xE0040304 +#define TPIU_FSCR 0xE0040308 /* DCB_DHCSR bit and field definitions */ #define DBGKEY (0xA05F << 16) @@ -174,6 +175,7 @@ struct cortex_m_common { int fp_num_lit; int fp_num_code; int fp_code_available; + int fp_rev; int fpb_enabled; int auto_bp_type; struct cortex_m_fp_comparator *fp_comparator_list; @@ -210,5 +212,6 @@ int cortex_m_remove_watchpoint(struct target *target, struct watchpoint *watchpo void cortex_m_enable_breakpoints(struct target *target); void cortex_m_enable_watchpoints(struct target *target); void cortex_m_dwt_setup(struct cortex_m_common *cm, struct target *target); +void cortex_m_deinit_target(struct target *target); #endif /* CORTEX_M_H */