X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fcortex_m3.c;h=195a3b9ad5b554df990b89f4bd05d3ea7de73873;hb=1527272fb21beee7839335ea5587e879163d2ed1;hp=e7b5110791c74438519082dfd477c4bd737bec27;hpb=75a37eb5b37386768327e9670acfedc7811d529f;p=openocd.git

diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index e7b5110791..195a3b9ad5 100644
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -221,7 +221,7 @@ static int cortex_m3_endreset_event(struct target *target)
 	}
 	swjdp_transaction_endcheck(swjdp);
 
-	armv7m_invalidate_core_regs(target);
+	register_cache_invalidate(cortex_m3->armv7m.core_cache);
 
 	/* make sure we have latest dhcsr flags */
 	mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);
@@ -510,7 +510,7 @@ static int cortex_m3_soft_reset_halt(struct target *target)
 	target->state = TARGET_RESET;
 
 	/* registers are now invalid */
-	armv7m_invalidate_core_regs(target);
+	register_cache_invalidate(cortex_m3->armv7m.core_cache);
 
 	while (timeout < 100)
 	{
@@ -617,7 +617,8 @@ static int cortex_m3_resume(struct target *target, int current,
 	target->debug_reason = DBG_REASON_NOTHALTED;
 
 	/* registers are now invalid */
-	armv7m_invalidate_core_regs(target);
+	register_cache_invalidate(armv7m->core_cache);
+
 	if (!debug_execution)
 	{
 		target->state = TARGET_RUNNING;
@@ -673,7 +674,7 @@ static int cortex_m3_step(struct target *target, int current,
 	mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);
 
 	/* registers are now invalid */
-	armv7m_invalidate_core_regs(target);
+	register_cache_invalidate(cortex_m3->armv7m.core_cache);
 
 	if (breakpoint)
 		cortex_m3_set_breakpoint(target, breakpoint);
@@ -812,7 +813,7 @@ static int cortex_m3_assert_reset(struct target *target)
 	target->state = TARGET_RESET;
 	jtag_add_sleep(50000);
 
-	armv7m_invalidate_core_regs(target);
+	register_cache_invalidate(cortex_m3->armv7m.core_cache);
 
 	if (target->reset_halt)
 	{
@@ -1140,13 +1141,6 @@ cortex_m3_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
 	struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 
-	/* REVISIT why check? DWT can be updated with core running ... */
-	if (target->state != TARGET_HALTED)
-	{
-		LOG_WARNING("target not halted");
-		return ERROR_TARGET_NOT_HALTED;
-	}
-
 	if (cortex_m3->dwt_comp_available < 1)
 	{
 		LOG_DEBUG("no comparators?");
@@ -1911,28 +1905,42 @@ COMMAND_HANDLER(handle_cortex_m3_mask_interrupts_command)
 	return ERROR_OK;
 }
 
-static int cortex_m3_register_commands(struct command_context *cmd_ctx)
-{
-	int retval;
-	struct command *cortex_m3_cmd;
-
-	retval = armv7m_register_commands(cmd_ctx);
-
-	cortex_m3_cmd = register_command(cmd_ctx, NULL, "cortex_m3",
-			NULL, COMMAND_ANY, "cortex_m3 specific commands");
-
-	register_command(cmd_ctx, cortex_m3_cmd, "disassemble",
-			handle_cortex_m3_disassemble_command, COMMAND_EXEC,
-			"disassemble Thumb2 instructions <address> [<count>]");
-	register_command(cmd_ctx, cortex_m3_cmd, "maskisr",
-			handle_cortex_m3_mask_interrupts_command, COMMAND_EXEC,
-			"mask cortex_m3 interrupts ['on'|'off']");
-	register_command(cmd_ctx, cortex_m3_cmd, "vector_catch",
-			handle_cortex_m3_vector_catch_command, COMMAND_EXEC,
-			"catch hardware vectors ['all'|'none'|<list>]");
-
-	return retval;
-}
+static const struct command_registration cortex_m3_exec_command_handlers[] = {
+	{
+		.name = "disassemble",
+		.handler = &handle_cortex_m3_disassemble_command,
+		.mode = COMMAND_EXEC,
+		.help = "disassemble Thumb2 instructions",
+		.usage = "<address> [<count>]",
+	},
+	{
+		.name = "maskisr",
+		.handler = &handle_cortex_m3_mask_interrupts_command,
+		.mode = COMMAND_EXEC,
+		.help = "mask cortex_m3 interrupts",
+		.usage = "['on'|'off']",
+	},
+	{
+		.name = "vector_catch",
+		.handler = &handle_cortex_m3_vector_catch_command,
+		.mode = COMMAND_EXEC,
+		.help = "catch hardware vectors",
+		.usage = "['all'|'none'|<list>]",
+	},
+	COMMAND_REGISTRATION_DONE
+};
+static const struct command_registration cortex_m3_command_handlers[] = {
+	{
+		.chain = armv7m_command_handlers,
+	},
+	{
+		.name = "cortex_m3",
+		.mode = COMMAND_ANY,
+		.help = "Cortex-M3 command group",
+		.chain = cortex_m3_exec_command_handlers,
+	},
+	COMMAND_REGISTRATION_DONE
+};
 
 struct target_type cortexm3_target =
 {
@@ -1966,7 +1974,7 @@ struct target_type cortexm3_target =
 	.add_watchpoint = cortex_m3_add_watchpoint,
 	.remove_watchpoint = cortex_m3_remove_watchpoint,
 
-	.register_commands = cortex_m3_register_commands,
+	.commands = cortex_m3_command_handlers,
 	.target_create = cortex_m3_target_create,
 	.init_target = cortex_m3_init_target,
 	.examine = cortex_m3_examine,