X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fcortex_m3.h;h=e16aa89feb96544664d4997f8e032843656341bd;hb=8c6b95ed162ada54b1165ca0c9b46aa92f92975c;hp=a7074d36c992ab5599652e84f860791f68b7cbb7;hpb=8fb2baaa6b428bd50165f045749786c34857ab02;p=openocd.git diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h index a7074d36c9..e16aa89feb 100644 --- a/src/target/cortex_m3.h +++ b/src/target/cortex_m3.h @@ -26,8 +26,6 @@ #ifndef CORTEX_M3_H #define CORTEX_M3_H -#include "register.h" -#include "target.h" #include "armv7m.h" @@ -45,6 +43,7 @@ #define DCRSR_WnR (1 << 16) #define DWT_CTRL 0xE0001000 +#define DWT_CYCCNT 0xE0001004 #define DWT_COMP0 0xE0001020 #define DWT_MASK0 0xE0001024 #define DWT_FUNCTION0 0xE0001028 @@ -118,27 +117,40 @@ #define FPCR_REPLACE_BKPT_HIGH (2 << 30) #define FPCR_REPLACE_BKPT_BOTH (3 << 30) -typedef struct cortex_m3_fp_comparator_s +struct cortex_m3_fp_comparator { int used; int type; uint32_t fpcr_value; uint32_t fpcr_address; -} cortex_m3_fp_comparator_t; +}; -typedef struct cortex_m3_dwt_comparator_s +struct cortex_m3_dwt_comparator { int used; uint32_t comp; uint32_t mask; uint32_t function; uint32_t dwt_comparator_address; -} cortex_m3_dwt_comparator_t; +}; -typedef struct cortex_m3_common_s +enum cortex_m3_soft_reset_config +{ + CORTEX_M3_RESET_SYSRESETREQ, + CORTEX_M3_RESET_VECTRESET, +}; + +enum cortex_m3_isrmasking_mode +{ + CORTEX_M3_ISRMASK_AUTO, + CORTEX_M3_ISRMASK_OFF, + CORTEX_M3_ISRMASK_ON, +}; + +struct cortex_m3_common { int common_magic; - arm_jtag_t jtag_info; + struct arm_jtag jtag_info; /* Context information */ uint32_t dcb_dhcsr; @@ -151,15 +163,26 @@ typedef struct cortex_m3_common_s int fp_code_available; int fpb_enabled; int auto_bp_type; - cortex_m3_fp_comparator_t *fp_comparator_list; + struct cortex_m3_fp_comparator *fp_comparator_list; /* Data Watchpoint and Trace (DWT) */ int dwt_num_comp; int dwt_comp_available; - cortex_m3_dwt_comparator_t *dwt_comparator_list; + struct cortex_m3_dwt_comparator *dwt_comparator_list; + struct reg_cache *dwt_cache; - armv7m_common_t armv7m; - void *arch_info; -} cortex_m3_common_t; + enum cortex_m3_soft_reset_config soft_reset_config; + + enum cortex_m3_isrmasking_mode isrmasking_mode; + + struct armv7m_common armv7m; +}; + +static inline struct cortex_m3_common * +target_to_cm3(struct target *target) +{ + return container_of(target->arch_info, + struct cortex_m3_common, armv7m); +} #endif /* CORTEX_M3_H */