X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fembeddedice.c;h=7aef153b584dfabe6d9af984e34a64e6062c5484;hb=HEAD;hp=016883086c835c94c1bc3e8c72ba5500fcdf1aa1;hpb=08d4411b59dd8bd0e7d8009003b71d23acbf6eee;p=openocd.git diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c index 016883086c..7aef153b58 100644 --- a/src/target/embeddedice.c +++ b/src/target/embeddedice.c @@ -1,3 +1,5 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + /*************************************************************************** * Copyright (C) 2005 by Dominic Rath * * Dominic.Rath@gmx.de * @@ -7,21 +9,6 @@ * * * Copyright (C) 2008 by Spencer Oliver * * spen@spen-soft.co.uk * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * ***************************************************************************/ #ifdef HAVE_CONFIG_H @@ -30,6 +17,7 @@ #include "embeddedice.h" #include "register.h" +#include /** * @file @@ -54,9 +42,9 @@ static int embeddedice_set_reg_w_exec(struct reg *reg, uint8_t *buf); * From: ARM9E-S TRM, DDI 0165, table C-4 (and similar, for other cores) */ static const struct { - char *name; - unsigned short addr; - unsigned short width; + const char *name; + unsigned short addr; + unsigned short width; } eice_regs[] = { [EICE_DBG_CTRL] = { .name = "debug_ctrl", @@ -206,8 +194,8 @@ struct reg_cache *embeddedice_build_reg_cache(struct target *target, for (i = 0; i < num_regs; i++) { reg_list[i].name = eice_regs[i].name; reg_list[i].size = eice_regs[i].width; - reg_list[i].dirty = 0; - reg_list[i].valid = 0; + reg_list[i].dirty = false; + reg_list[i].valid = false; reg_list[i].value = calloc(1, 4); reg_list[i].arch_info = &arch_info[i]; reg_list[i].type = &eice_reg_type; @@ -304,6 +292,22 @@ struct reg_cache *embeddedice_build_reg_cache(struct target *target, return reg_cache; } +/** + * Free all memory allocated for EmbeddedICE register cache + */ +void embeddedice_free_reg_cache(struct reg_cache *reg_cache) +{ + if (!reg_cache) + return; + + for (unsigned int i = 0; i < reg_cache->num_regs; i++) + free(reg_cache->reg_list[i].value); + + free(reg_cache->reg_list[0].arch_info); + free(reg_cache->reg_list); + free(reg_cache); +} + /** * Initialize EmbeddedICE module, if needed. */ @@ -349,7 +353,7 @@ int embeddedice_read_reg_w_check(struct reg *reg, if (retval != ERROR_OK) return retval; - retval = arm_jtag_set_instr(ice_reg->jtag_info, + retval = arm_jtag_set_instr(ice_reg->jtag_info->tap, ice_reg->jtag_info->intest_instr, NULL, TAP_IDLE); if (retval != ERROR_OK) return retval; @@ -415,7 +419,7 @@ int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t siz retval = arm_jtag_scann(jtag_info, 0x2, TAP_IDLE); if (retval != ERROR_OK) return retval; - retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE); + retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_IDLE); if (retval != ERROR_OK) return retval; @@ -471,8 +475,8 @@ void embeddedice_set_reg(struct reg *reg, uint32_t value) embeddedice_write_reg(reg, value); buf_set_u32(reg->value, 0, reg->size, value); - reg->valid = 1; - reg->dirty = 0; + reg->valid = true; + reg->dirty = false; } @@ -502,7 +506,7 @@ void embeddedice_write_reg(struct reg *reg, uint32_t value) arm_jtag_scann(ice_reg->jtag_info, 0x2, TAP_IDLE); - arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL, TAP_IDLE); + arm_jtag_set_instr(ice_reg->jtag_info->tap, ice_reg->jtag_info->intest_instr, NULL, TAP_IDLE); uint8_t reg_addr = ice_reg->addr & 0x1f; embeddedice_write_reg_inner(ice_reg->jtag_info->tap, reg_addr, value); @@ -536,7 +540,7 @@ int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size) retval = arm_jtag_scann(jtag_info, 0x2, TAP_IDLE); if (retval != ERROR_OK) return retval; - retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE); + retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_IDLE); if (retval != ERROR_OK) return retval; @@ -578,8 +582,8 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou uint8_t field2_out[1]; int retval; uint32_t hsact; - struct timeval lap; struct timeval now; + struct timeval timeout_end; if (hsbit == EICE_COMM_CTRL_WBIT) hsact = 1; @@ -593,7 +597,7 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou retval = arm_jtag_scann(jtag_info, 0x2, TAP_IDLE); if (retval != ERROR_OK) return retval; - retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_IDLE); + retval = arm_jtag_set_instr(jtag_info->tap, jtag_info->intest_instr, NULL, TAP_IDLE); if (retval != ERROR_OK) return retval; @@ -612,7 +616,8 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou fields[2].in_value = NULL; jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE); - gettimeofday(&lap, NULL); + gettimeofday(&timeout_end, NULL); + timeval_add_time(&timeout_end, 0, timeout * 1000); do { jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE); retval = jtag_execute_queue(); @@ -623,14 +628,12 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou return ERROR_OK; gettimeofday(&now, NULL); - } while ((uint32_t)((now.tv_sec - lap.tv_sec) * 1000 - + (now.tv_usec - lap.tv_usec) / 1000) <= timeout); + } while (timeval_compare(&now, &timeout_end) <= 0); LOG_ERROR("embeddedice handshake timeout"); return ERROR_TARGET_TIMEOUT; } -#ifndef HAVE_JTAG_MINIDRIVER_H /** * This is an inner loop of the open loop DCC write of data to target */ @@ -645,6 +648,3 @@ void embeddedice_write_dcc(struct jtag_tap *tap, buffer += 4; } } -#else -/* provided by minidriver */ -#endif