X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips32.c;h=c82536931e4d2f1c834746297519f92ea350642b;hb=7819834ace37ca7f5d1b834c761dfcb9964ef845;hp=5260032164e3fb59f005003fa0328fce303409b6;hpb=6cb5ba6f1136df2986850f5c176cb38e34ca1795;p=openocd.git

diff --git a/src/target/mips32.c b/src/target/mips32.c
index 5260032164..c82536931e 100644
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -226,7 +226,7 @@ static int mips32_write_core_reg(struct target *target, unsigned int num)
 
 	reg_value = buf_get_u32(mips32->core_cache->reg_list[num].value, 0, 32);
 	mips32->core_regs[num] = reg_value;
-	LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num , reg_value);
+	LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num, reg_value);
 	mips32->core_cache->reg_list[num].valid = true;
 	mips32->core_cache->reg_list[num].dirty = false;
 
@@ -473,7 +473,7 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
 		if (reg_params[i].direction == PARAM_IN)
 			continue;
 
-		struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, 0);
+		struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, false);
 
 		if (!reg) {
 			LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
@@ -507,7 +507,7 @@ int mips32_run_algorithm(struct target *target, int num_mem_params,
 
 	for (int i = 0; i < num_reg_params; i++) {
 		if (reg_params[i].direction != PARAM_OUT) {
-			struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, 0);
+			struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, false);
 			if (!reg) {
 				LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
 				return ERROR_COMMAND_SYNTAX_ERROR;
@@ -723,9 +723,9 @@ int mips32_read_config_regs(struct target *target)
 				break;	/* no more config registers implemented */
 		}
 	else
-		return ERROR_OK;	/* already succesfully read */
+		return ERROR_OK;	/* already successfully read */
 
-	LOG_DEBUG("read  %"PRId32" config registers", ejtag_info->config_regs);
+	LOG_DEBUG("read  %"PRIu32" config registers", ejtag_info->config_regs);
 
 	if (ejtag_info->impcode & EJTAG_IMP_MIPS16) {
 		mips32->isa_imp = MIPS32_MIPS16;
@@ -950,11 +950,11 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
 			retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel);
 			if (retval != ERROR_OK) {
 				command_print(CMD,
-						"couldn't access reg %" PRIi32,
+						"couldn't access reg %" PRIu32,
 						cp0_reg);
 				return ERROR_OK;
 			}
-			command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
+			command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32,
 					cp0_reg, cp0_sel, value);
 
 		} else if (CMD_ARGC == 3) {
@@ -963,11 +963,11 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
 			retval = mips32_cp0_write(ejtag_info, value, cp0_reg, cp0_sel);
 			if (retval != ERROR_OK) {
 				command_print(CMD,
-						"couldn't access cp0 reg %" PRIi32 ", select %" PRIi32,
+						"couldn't access cp0 reg %" PRIu32 ", select %" PRIu32,
 						cp0_reg,  cp0_sel);
 				return ERROR_OK;
 			}
-			command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
+			command_print(CMD, "cp0 reg %" PRIu32 ", select %" PRIu32 ": %8.8" PRIx32,
 					cp0_reg, cp0_sel, value);
 		}
 	}