X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips32.h;h=005798d5d259a305a2fa6130af8b9f6698e06e54;hb=3885ab5a5af7ece410ce3eeb1059da3ea950436a;hp=33f0c8338d21646d07838776511c39b57c3db246;hpb=fb1a9b2cb2f844a17d26dfeb3d26849364d93e26;p=openocd.git diff --git a/src/target/mips32.h b/src/target/mips32.h index 33f0c8338d..005798d5d2 100644 --- a/src/target/mips32.h +++ b/src/target/mips32.h @@ -31,7 +31,7 @@ #define MIPS32_COMMON_MAGIC 0xB320B320 /* offsets into mips32 core register cache */ -enum +enum { MIPS32_PC = 37, MIPS32NUMCOREREGS @@ -52,7 +52,7 @@ typedef struct mips32_common_s reg_cache_t *core_cache; mips_ejtag_t ejtag_info; uint32_t core_regs[MIPS32NUMCOREREGS]; - + int bp_scanned; int num_inst_bpoints; int num_data_bpoints; @@ -60,7 +60,7 @@ typedef struct mips32_common_s int num_data_bpoints_avail; mips32_comparator_t *inst_break_list; mips32_comparator_t *data_break_list; - + /* register cache to processor synchronization */ int (*read_core_reg)(struct target_s *target, int num); int (*write_core_reg)(struct target_s *target, int num); @@ -124,18 +124,32 @@ typedef struct mips32_core_reg_s #define MIPS32_SDBBP 0x7000003F #define MIPS16_SDBBP 0xE801 -extern int mips32_arch_state(struct target_s *target); -extern int mips32_init_arch_info(target_t *target, mips32_common_t *mips32, jtag_tap_t *tap); -extern int mips32_restore_context(target_t *target); -extern int mips32_save_context(target_t *target); -extern reg_cache_t *mips32_build_reg_cache(target_t *target); -extern int mips32_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info); -extern int mips32_configure_break_unit(struct target_s *target); -extern int mips32_enable_interrupts(struct target_s *target, int enable); -extern int mips32_examine(struct target_s *target); - -extern int mips32_register_commands(struct command_context_s *cmd_ctx); -extern int mips32_invalidate_core_regs(target_t *target); -extern int mips32_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_size); +int mips32_arch_state(struct target_s *target); + +int mips32_init_arch_info(target_t *target, + mips32_common_t *mips32, jtag_tap_t *tap); + +int mips32_restore_context(target_t *target); +int mips32_save_context(target_t *target); + +reg_cache_t *mips32_build_reg_cache(target_t *target); + +int mips32_run_algorithm(struct target_s *target, + int num_mem_params, mem_param_t *mem_params, + int num_reg_params, reg_param_t *reg_params, + uint32_t entry_point, uint32_t exit_point, + int timeout_ms, void *arch_info); + +int mips32_configure_break_unit(struct target_s *target); + +int mips32_enable_interrupts(struct target_s *target, int enable); + +int mips32_examine(struct target_s *target); + +int mips32_register_commands(struct command_context_s *cmd_ctx); + +int mips32_invalidate_core_regs(target_t *target); +int mips32_get_gdb_reg_list(target_t *target, + reg_t **reg_list[], int *reg_list_size); #endif /*MIPS32_H*/