X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips32_dmaacc.c;h=220ea94f92405dc0671b1b84c2f7643397341591;hb=e9493cc20a0c2160696b24757274ec4ee302ac39;hp=7d3c2dabab13774120a03f575ffca295f3c1d0d6;hpb=b48a94f05da3a887f1978da01db77b79513d4aa9;p=openocd.git
diff --git a/src/target/mips32_dmaacc.c b/src/target/mips32_dmaacc.c
index 7d3c2dabab..220ea94f92 100644
--- a/src/target/mips32_dmaacc.c
+++ b/src/target/mips32_dmaacc.c
@@ -18,16 +18,29 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * along with this program. If not, see . *
***************************************************************************/
+
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "mips32_dmaacc.h"
-
+#include
+
+static int mips32_dmaacc_read_mem8(struct mips_ejtag *ejtag_info,
+ uint32_t addr, int count, uint8_t *buf);
+static int mips32_dmaacc_read_mem16(struct mips_ejtag *ejtag_info,
+ uint32_t addr, int count, uint16_t *buf);
+static int mips32_dmaacc_read_mem32(struct mips_ejtag *ejtag_info,
+ uint32_t addr, int count, uint32_t *buf);
+
+static int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info,
+ uint32_t addr, int count, const uint8_t *buf);
+static int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info,
+ uint32_t addr, int count, const uint16_t *buf);
+static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info,
+ uint32_t addr, int count, const uint32_t *buf);
/*
* The following logic shamelessly cloned from HairyDairyMaid's wrt54g_debrick
@@ -39,6 +52,22 @@
* displaying/modifying memory and memory mapped registers.
*/
+static int ejtag_dma_dstrt_poll(struct mips_ejtag *ejtag_info)
+{
+ uint32_t ejtag_ctrl;
+ int64_t start = timeval_ms();
+
+ do {
+ if (timeval_ms() - start > 1000) {
+ LOG_ERROR("DMA time out");
+ return -ETIMEDOUT;
+ }
+ ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
+ mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+ } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ return 0;
+}
+
static int ejtag_dma_read(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *data)
{
uint32_t v;
@@ -58,10 +87,7 @@ begin_ejtag_dma_read:
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
/* Wait for DSTRT to Clear */
- do {
- ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ ejtag_dma_dstrt_poll(ejtag_info);
/* Read Data */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
@@ -71,14 +97,12 @@ begin_ejtag_dma_read:
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- if (ejtag_ctrl & EJTAG_CTRL_DERR)
- {
+ if (ejtag_ctrl & EJTAG_CTRL_DERR) {
if (retries--) {
- LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)", addr);
goto begin_ejtag_dma_read;
- }
- else
- LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ\n", addr);
+ } else
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -100,14 +124,12 @@ begin_ejtag_dma_read_h:
/* Initiate DMA Read & set DSTRT */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
- ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_HALFWORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
+ ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_HALFWORD |
+ EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
/* Wait for DSTRT to Clear */
- do {
- ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ ejtag_dma_dstrt_poll(ejtag_info);
/* Read Data */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
@@ -117,14 +139,12 @@ begin_ejtag_dma_read_h:
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- if (ejtag_ctrl & EJTAG_CTRL_DERR)
- {
+ if (ejtag_ctrl & EJTAG_CTRL_DERR) {
if (retries--) {
- LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)", addr);
goto begin_ejtag_dma_read_h;
- }
- else
- LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ\n", addr);
+ } else
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -156,10 +176,7 @@ begin_ejtag_dma_read_b:
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
/* Wait for DSTRT to Clear */
- do {
- ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ ejtag_dma_dstrt_poll(ejtag_info);
/* Read Data */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
@@ -169,14 +186,12 @@ begin_ejtag_dma_read_b:
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- if (ejtag_ctrl & EJTAG_CTRL_DERR)
- {
+ if (ejtag_ctrl & EJTAG_CTRL_DERR) {
if (retries--) {
- LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)", addr);
goto begin_ejtag_dma_read_b;
- }
- else
- LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ\n", addr);
+ } else
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -223,23 +238,18 @@ begin_ejtag_dma_write:
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
/* Wait for DSTRT to Clear */
- do {
- ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ ejtag_dma_dstrt_poll(ejtag_info);
/* Clear DMA & Check DERR */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- if (ejtag_ctrl & EJTAG_CTRL_DERR)
- {
+ if (ejtag_ctrl & EJTAG_CTRL_DERR) {
if (retries--) {
- LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)", addr);
goto begin_ejtag_dma_write;
- }
- else
- LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE\n", addr);
+ } else
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -274,23 +284,18 @@ begin_ejtag_dma_write_h:
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
/* Wait for DSTRT to Clear */
- do {
- ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ ejtag_dma_dstrt_poll(ejtag_info);
/* Clear DMA & Check DERR */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- if (ejtag_ctrl & EJTAG_CTRL_DERR)
- {
+ if (ejtag_ctrl & EJTAG_CTRL_DERR) {
if (retries--) {
- LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)", addr);
goto begin_ejtag_dma_write_h;
- }
- else
- LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE\n", addr);
+ } else
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -326,23 +331,18 @@ begin_ejtag_dma_write_b:
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
/* Wait for DSTRT to Clear */
- do {
- ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ ejtag_dma_dstrt_poll(ejtag_info);
/* Clear DMA & Check DERR */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- if (ejtag_ctrl & EJTAG_CTRL_DERR)
- {
+ if (ejtag_ctrl & EJTAG_CTRL_DERR) {
if (retries--) {
- LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)", addr);
goto begin_ejtag_dma_write_b;
- }
- else
- LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE\n", addr);
+ } else
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -351,106 +351,110 @@ begin_ejtag_dma_write_b:
int mips32_dmaacc_read_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
{
- switch (size)
- {
+ switch (size) {
case 1:
- return mips32_dmaacc_read_mem8(ejtag_info, addr, count, (uint8_t*)buf);
+ return mips32_dmaacc_read_mem8(ejtag_info, addr, count, (uint8_t *)buf);
case 2:
- return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (uint16_t*)buf);
+ return mips32_dmaacc_read_mem16(ejtag_info, addr, count, (uint16_t *)buf);
case 4:
- return mips32_dmaacc_read_mem32(ejtag_info, addr, count, (uint32_t*)buf);
+ return mips32_dmaacc_read_mem32(ejtag_info, addr, count, (uint32_t *)buf);
}
return ERROR_OK;
}
-int mips32_dmaacc_read_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf)
+static int mips32_dmaacc_read_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf)
{
int i;
int retval;
for (i = 0; i < count; i++) {
- if ((retval = ejtag_dma_read(ejtag_info, addr + i*sizeof(*buf), &buf[i])) != ERROR_OK)
+ retval = ejtag_dma_read(ejtag_info, addr + i * sizeof(*buf), &buf[i]);
+ if (retval != ERROR_OK)
return retval;
}
return ERROR_OK;
}
-int mips32_dmaacc_read_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
+static int mips32_dmaacc_read_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
{
int i;
int retval;
for (i = 0; i < count; i++) {
- if ((retval = ejtag_dma_read_h(ejtag_info, addr + i*sizeof(*buf), &buf[i])) != ERROR_OK)
+ retval = ejtag_dma_read_h(ejtag_info, addr + i * sizeof(*buf), &buf[i]);
+ if (retval != ERROR_OK)
return retval;
}
return ERROR_OK;
}
-int mips32_dmaacc_read_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
+static int mips32_dmaacc_read_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
{
int i;
int retval;
for (i = 0; i < count; i++) {
- if ((retval = ejtag_dma_read_b(ejtag_info, addr + i*sizeof(*buf), &buf[i])) != ERROR_OK)
+ retval = ejtag_dma_read_b(ejtag_info, addr + i * sizeof(*buf), &buf[i]);
+ if (retval != ERROR_OK)
return retval;
}
return ERROR_OK;
}
-int mips32_dmaacc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
+int mips32_dmaacc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, const void *buf)
{
- switch (size)
- {
+ switch (size) {
case 1:
- return mips32_dmaacc_write_mem8(ejtag_info, addr, count, (uint8_t*)buf);
+ return mips32_dmaacc_write_mem8(ejtag_info, addr, count, buf);
case 2:
- return mips32_dmaacc_write_mem16(ejtag_info, addr, count,(uint16_t*)buf);
+ return mips32_dmaacc_write_mem16(ejtag_info, addr, count, buf);
case 4:
- return mips32_dmaacc_write_mem32(ejtag_info, addr, count, (uint32_t*)buf);
+ return mips32_dmaacc_write_mem32(ejtag_info, addr, count, buf);
}
return ERROR_OK;
}
-int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf)
+static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, const uint32_t *buf)
{
int i;
int retval;
for (i = 0; i < count; i++) {
- if ((retval = ejtag_dma_write(ejtag_info, addr + i*sizeof(*buf), buf[i])) != ERROR_OK)
+ retval = ejtag_dma_write(ejtag_info, addr + i * sizeof(*buf), buf[i]);
+ if (retval != ERROR_OK)
return retval;
}
return ERROR_OK;
}
-int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
+static int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, const uint16_t *buf)
{
int i;
int retval;
for (i = 0; i < count; i++) {
- if ((retval = ejtag_dma_write_h(ejtag_info, addr + i*sizeof(*buf), buf[i])) != ERROR_OK)
+ retval = ejtag_dma_write_h(ejtag_info, addr + i * sizeof(*buf), buf[i]);
+ if (retval != ERROR_OK)
return retval;
}
return ERROR_OK;
}
-int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
+static int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, const uint8_t *buf)
{
int i;
int retval;
for (i = 0; i < count; i++) {
- if ((retval = ejtag_dma_write_b(ejtag_info, addr + i*sizeof(*buf), buf[i])) != ERROR_OK)
+ retval = ejtag_dma_write_b(ejtag_info, addr + i * sizeof(*buf), buf[i]);
+ if (retval != ERROR_OK)
return retval;
}