X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips32_pracc.h;h=0c106bab555786f279dff21558d5e39968659e51;hb=8c6b95ed162ada54b1165ca0c9b46aa92f92975c;hp=a914686cc70074b75166c45e268d464d786b3b07;hpb=f6412d9c7b22ab25caec6be19317f0fc4a840fdd;p=openocd.git

diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h
index a914686cc7..0c106bab55 100644
--- a/src/target/mips32_pracc.h
+++ b/src/target/mips32_pracc.h
@@ -4,6 +4,9 @@
  *                                                                         *
  *   Copyright (C) 2008 by David T.L. Wong                                 *
  *                                                                         *
+ *   Copyright (C) 2011 by Drasko DRASKOVIC                                *
+ *   drasko.draskovic@gmail.com                                            *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -27,17 +30,17 @@
 
 #define MIPS32_PRACC_FASTDATA_AREA		0xFF200000
 #define MIPS32_PRACC_FASTDATA_SIZE		16
-#define MIPS32_PRACC_TEXT			0xFF200200
-#define MIPS32_PRACC_STACK			0xFF204000
-#define MIPS32_PRACC_PARAM_IN		0xFF201000
-#define MIPS32_PRACC_PARAM_IN_SIZE	0x1000
-#define MIPS32_PRACC_PARAM_OUT		(MIPS32_PRACC_PARAM_IN + MIPS32_PRACC_PARAM_IN_SIZE)
-#define MIPS32_PRACC_PARAM_OUT_SIZE	0x1000
+#define MIPS32_PRACC_TEXT				0xFF200200
+#define MIPS32_PRACC_STACK				0xFF204000
+#define MIPS32_PRACC_PARAM_IN			0xFF201000
+#define MIPS32_PRACC_PARAM_IN_SIZE		0x1000
+#define MIPS32_PRACC_PARAM_OUT			(MIPS32_PRACC_PARAM_IN + MIPS32_PRACC_PARAM_IN_SIZE)
+#define MIPS32_PRACC_PARAM_OUT_SIZE		0x1000
 
 #define MIPS32_FASTDATA_HANDLER_SIZE	0x80
-#define UPPER16(uint32_t) (uint32_t >> 16)
-#define LOWER16(uint32_t) (uint32_t & 0xFFFF)
-#define NEG16(v) (((~(v)) + 1) & 0xFFFF)
+#define UPPER16(uint32_t)				(uint32_t >> 16)
+#define LOWER16(uint32_t)				(uint32_t & 0xFFFF)
+#define NEG16(v)						(((~(v)) + 1) & 0xFFFF)
 /*#define NEG18(v) (((~(v)) + 1) & 0x3FFFF)*/
 
 int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info,
@@ -45,25 +48,7 @@ int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info,
 int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info,
 		uint32_t addr, int size, int count, void *buf);
 int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_area *source,
-		int write, uint32_t addr, int count, uint32_t *buf);
-
-int mips32_pracc_read_mem8(struct mips_ejtag *ejtag_info,
-		uint32_t addr, int count, uint8_t *buf);
-int mips32_pracc_read_mem16(struct mips_ejtag *ejtag_info,
-		uint32_t addr, int count, uint16_t *buf);
-int mips32_pracc_read_mem32(struct mips_ejtag *ejtag_info,
-		uint32_t addr, int count, uint32_t *buf);
-int mips32_pracc_read_u32(struct mips_ejtag *ejtag_info,
-		uint32_t addr, uint32_t *buf);
-
-int mips32_pracc_write_mem8(struct mips_ejtag *ejtag_info,
-		uint32_t addr, int count, uint8_t *buf);
-int mips32_pracc_write_mem16(struct mips_ejtag *ejtag_info,
-		uint32_t addr, int count, uint16_t *buf);
-int mips32_pracc_write_mem32(struct mips_ejtag *ejtag_info,
-		uint32_t addr, int count, uint32_t *buf);
-int mips32_pracc_write_u32(struct mips_ejtag *ejtag_info,
-		uint32_t addr, uint32_t *buf);
+		int write_t, uint32_t addr, int count, uint32_t *buf);
 
 int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs);
 int mips32_pracc_write_regs(struct mips_ejtag *ejtag_info, uint32_t *regs);
@@ -72,4 +57,36 @@ int mips32_pracc_exec(struct mips_ejtag *ejtag_info, int code_len, const uint32_
 		int num_param_in, uint32_t *param_in,
 		int num_param_out, uint32_t *param_out, int cycle);
 
+/**
+ * \b mips32_cp0_read
+ *
+ * Simulates mfc0 ASM instruction (Move From C0),
+ * i.e. implements copro C0 Register read.
+ *
+ * @param[in] ejtag_info
+ * @param[in] val Storage to hold read value
+ * @param[in] cp0_reg Number of copro C0 register we want to read
+ * @param[in] cp0_sel Select for the given C0 register
+ *
+ * @return ERROR_OK on Sucess, ERROR_FAIL otherwise
+ */
+int mips32_cp0_read(struct mips_ejtag *ejtag_info,
+								uint32_t *val, uint32_t cp0_reg, uint32_t cp0_sel);
+
+/**
+ * \b mips32_cp0_write
+ *
+ * Simulates mtc0 ASM instruction (Move To C0),
+ * i.e. implements copro C0 Register read.
+ *
+ * @param[in] ejtag_info
+ * @param[in] val Value to be written
+ * @param[in] cp0_reg Number of copro C0 register we want to write to
+ * @param[in] cp0_sel Select for the given C0 register
+ *
+ * @return ERROR_OK on Sucess, ERROR_FAIL otherwise
+ */
+int mips32_cp0_write(struct mips_ejtag *ejtag_info,
+											uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel);
+
 #endif