X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips32_pracc.h;h=30edaec0a28a91806e954c544f54c8b55fca5e32;hb=0f11f951e7774c54953f3f06916dcb62ac9b086d;hp=e990f8d0c7cabe258d2c84ad2031d337e16042f9;hpb=e32058811794388038fcb7da930f3154c0cb7ea2;p=openocd.git

diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h
index e990f8d0c7..30edaec0a2 100644
--- a/src/target/mips32_pracc.h
+++ b/src/target/mips32_pracc.h
@@ -30,32 +30,38 @@
 #define MIPS32_PRACC_FASTDATA_AREA		0xFF200000
 #define MIPS32_PRACC_FASTDATA_SIZE		16
 #define MIPS32_PRACC_BASE_ADDR			0xFF200000
-#define MIPS32_PRACC_TEXT				0xFF200200
+#define MIPS32_PRACC_TEXT			0xFF200200
 #define MIPS32_PRACC_PARAM_OUT			0xFF202000
 
 #define PRACC_UPPER_BASE_ADDR			(MIPS32_PRACC_BASE_ADDR >> 16)
+#define PRACC_MAX_CODE				(MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_TEXT)
+#define PRACC_MAX_INSTRUCTIONS			(PRACC_MAX_CODE / 4)
 #define PRACC_OUT_OFFSET			(MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_BASE_ADDR)
 
-#define MIPS32_FASTDATA_HANDLER_SIZE	0x80
-#define UPPER16(uint32_t)				(uint32_t >> 16)
-#define LOWER16(uint32_t)				(uint32_t & 0xFFFF)
-#define NEG16(v)						(((~(v)) + 1) & 0xFFFF)
+#define MIPS32_FASTDATA_HANDLER_SIZE		0x80
+#define UPPER16(addr)				((addr) >> 16)
+#define LOWER16(addr)				((addr) & 0xFFFF)
+#define NEG16(v)				(((~(v)) + 1) & 0xFFFF)
+#define SWAP16(v)				((LOWER16(v) << 16) | (UPPER16(v)))
 /*#define NEG18(v) (((~(v)) + 1) & 0x3FFFF)*/
 
 #define PRACC_BLOCK	128	/* 1 Kbyte */
 
-typedef struct {
+struct pa_list {
 	uint32_t instr;
 	uint32_t addr;
-} pa_list;
+};
 
 struct pracc_queue_info {
+	struct mips_ejtag *ejtag_info;
+	unsigned isa;
 	int retval;
 	int code_count;
 	int store_count;
-	int max_code;		/* max intstructions with currently allocated memory */
-	pa_list *pracc_list;	/* Code and store addresses at dmseg */
+	int max_code;		/* max instructions with currently allocated memory */
+	struct pa_list *pracc_list;	/* Code and store addresses at dmseg */
 };
+
 void pracc_queue_init(struct pracc_queue_info *ctx);
 void pracc_add(struct pracc_queue_info *ctx, uint32_t addr, uint32_t instr);
 void pracc_add_li32(struct pracc_queue_info *ctx, uint32_t reg_num, uint32_t data, bool optimize);
@@ -87,7 +93,7 @@ int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ct
  * @param[in] cp0_reg Number of copro C0 register we want to read
  * @param[in] cp0_sel Select for the given C0 register
  *
- * @return ERROR_OK on Sucess, ERROR_FAIL otherwise
+ * @return ERROR_OK on Success, ERROR_FAIL otherwise
  */
 int mips32_cp0_read(struct mips_ejtag *ejtag_info,
 		uint32_t *val, uint32_t cp0_reg, uint32_t cp0_sel);
@@ -103,9 +109,16 @@ int mips32_cp0_read(struct mips_ejtag *ejtag_info,
  * @param[in] cp0_reg Number of copro C0 register we want to write to
  * @param[in] cp0_sel Select for the given C0 register
  *
- * @return ERROR_OK on Sucess, ERROR_FAIL otherwise
+ * @return ERROR_OK on Success, ERROR_FAIL otherwise
  */
 int mips32_cp0_write(struct mips_ejtag *ejtag_info,
 		uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel);
 
+static inline void pracc_swap16_array(struct mips_ejtag *ejtag_info, uint32_t *buf, int count)
+{
+	if (ejtag_info->isa && ejtag_info->endianness)
+		for (int i = 0; i != count; i++)
+			buf[i] = SWAP16(buf[i]);
+}
+
 #endif /* OPENOCD_TARGET_MIPS32_PRACC_H */