X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fmips_ejtag.h;h=ead0876d25aab0a2f386e9e351fe307c6e8cf779;hb=2268b771428c982846b097fa12913283de6dd78b;hp=59f91b50b7d743c243ba5be7769a0d0966209f77;hpb=08d4411b59dd8bd0e7d8009003b71d23acbf6eee;p=openocd.git

diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index 59f91b50b7..ead0876d25 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -110,18 +110,50 @@
 #define EJTAG_DCR_DB			(1 << 17)
 #define EJTAG_DCR_IB			(1 << 16)
 #define EJTAG_DCR_INTE			(1 << 4)
+#define EJTAG_DCR_MP			(1 << 2)
 
 /* breakpoint support */
-#define EJTAG_IBS				0xFF301000
-#define EJTAG_IBA1				0xFF301100
-#define EJTAG_DBS				0xFF302000
-#define EJTAG_DBA1				0xFF302100
+/* EJTAG_V20_* was tested on Broadcom BCM7401
+ * and may or will differ with other hardware. For example EZ4021-FC. */
+#define EJTAG_V20_IBS			0xFF300004
+#define EJTAG_V20_IBA0			0xFF300100
+#define EJTAG_V20_IBC_OFFS		0x4	/* IBC Offset */
+#define EJTAG_V20_IBM_OFFS		0x8
+#define EJTAG_V20_IBAn_STEP		0x10	/* Offset for next channel */
+#define EJTAG_V20_DBS			0xFF30008
+#define EJTAG_V20_DBA0			0xFF300200
+#define EJTAG_V20_DBC_OFFS		0x4
+#define EJTAG_V20_DBM_OFFS		0x8
+#define EJTAG_V20_DBV_OFFS		0xc
+#define EJTAG_V20_DBAn_STEP		0x10
+
+#define EJTAG_V25_IBS			0xFF301000
+#define EJTAG_V25_IBA0			0xFF301100
+#define EJTAG_V25_IBM_OFFS		0x8
+#define EJTAG_V25_IBASID_OFFS		0x10
+#define EJTAG_V25_IBC_OFFS		0x18
+#define EJTAG_V25_IBAn_STEP		0x100
+#define EJTAG_V25_DBS			0xFF302000
+#define EJTAG_V25_DBA0			0xFF302100
+#define EJTAG_V25_DBM_OFFS		0x8
+#define EJTAG_V25_DBASID_OFFS		0x10
+#define EJTAG_V25_DBC_OFFS		0x18
+#define EJTAG_V25_DBV_OFFS		0x20
+#define EJTAG_V25_DBAn_STEP		0x100
+
 #define	EJTAG_DBCn_NOSB			(1 << 13)
 #define	EJTAG_DBCn_NOLB			(1 << 12)
 #define	EJTAG_DBCn_BLM_MASK		0xff
 #define	EJTAG_DBCn_BLM_SHIFT	4
 #define	EJTAG_DBCn_BE			(1 << 0)
 
+#define EJTAG_VERSION_20		0
+#define EJTAG_VERSION_25		1
+#define EJTAG_VERSION_26		2
+#define EJTAG_VERSION_31		3
+#define EJTAG_VERSION_41		4
+#define EJTAG_VERSION_51		5
+
 struct mips_ejtag {
 	struct jtag_tap *tap;
 	uint32_t impcode;
@@ -132,6 +164,28 @@ struct mips_ejtag {
 	uint32_t reg9;
 	unsigned scan_delay;
 	int mode;
+	uint32_t pa_ctrl;
+	uint32_t pa_addr;
+	unsigned int ejtag_version;
+
+	/* Memory-Mapped Registers. This addresses are not same on different
+	 * EJTAG versions. */
+	uint32_t ejtag_ibs_addr;	/* Instruction Address Break Status */
+	uint32_t ejtag_iba0_addr;	/* IAB channel 0 */
+	uint32_t ejtag_ibc_offs;	/* IAB Control offset */
+	uint32_t ejtag_ibm_offs;	/* IAB Mask offset */
+	uint32_t ejtag_ibasid_offs;	/* IAB ASID (4Kc) */
+
+	uint32_t ejtag_dbs_addr;	/* Data Address Break Status Register */
+	uint32_t ejtag_dba0_addr;	/* DAB channel 0 */
+	uint32_t ejtag_dbc_offs;	/* DAB Control offset */
+	uint32_t ejtag_dbm_offs;	/* DAB Mask offset */
+	uint32_t ejtag_dbv_offs;	/* DAB Value offset */
+	uint32_t ejtag_dbasid_offs;	/* DAB ASID (4Kc) */
+
+	uint32_t ejtag_iba_step_size;
+	uint32_t ejtag_dba_step_size;	/* siez of step till next
+					 * *DBAn register. */
 };
 
 void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info,