X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fnds32.c;h=11bb01d09712411e1607f036b4f1074462345496;hb=cd0ef0cd3f738a8e1b81cfc06b8ec46345f970f0;hp=c4bd63aadf197f53b777b7928e9df3b637fcaf11;hpb=0a4c8990c29e61fd0c2796486519cdb256b8da3b;p=openocd.git

diff --git a/src/target/nds32.c b/src/target/nds32.c
index c4bd63aadf..11bb01d097 100644
--- a/src/target/nds32.c
+++ b/src/target/nds32.c
@@ -1921,7 +1921,13 @@ int nds32_examine_debug_reason(struct nds32 *nds32)
 							&instruction))
 					return ERROR_FAIL;
 
-				target->debug_reason = DBG_REASON_BREAKPOINT;
+				/* hit 'break 0x7FFF' */
+				if ((instruction.info.opc_6 == 0x32) &&
+					(instruction.info.sub_opc == 0xA) &&
+					(instruction.info.imm == 0x7FFF)) {
+					target->debug_reason = DBG_REASON_EXIT;
+				} else
+					target->debug_reason = DBG_REASON_BREAKPOINT;
 			}
 			break;
 		case NDS32_DEBUG_DATA_ADDR_WATCHPOINT_PRECISE:
@@ -2153,11 +2159,17 @@ int nds32_assert_reset(struct target *target)
 {
 	struct nds32 *nds32 = target_to_nds32(target);
 	struct aice_port_s *aice = target_to_aice(target);
+	struct nds32_cpu_version *cpu_version = &(nds32->cpu_version);
 
 	jtag_poll_set_enabled(true);
 
 	if (target->reset_halt) {
-		if (nds32->soft_reset_halt)
+		if ((nds32->soft_reset_halt)
+			|| (nds32->edm.version < 0x51)
+			|| ((nds32->edm.version == 0x51)
+				&& (cpu_version->revision == 0x1C)
+				&& (cpu_version->cpu_id_family == 0xC)
+				&& (cpu_version->cpu_id_version == 0x0)))
 			target->type->soft_reset_halt(target);
 		else
 			aice_assert_srst(aice, AICE_RESET_HOLD);