X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fxscale.c;h=d270bf4f706e136576d12d6585b4b022825eab83;hb=b6f268c113521557889aa253e2dd7218507e20d9;hp=304477656f49b3c71bd000a6af9a9cd3da361512;hpb=c45de8073d027f1a4d39640dc140666f27960e3b;p=openocd.git diff --git a/src/target/xscale.c b/src/target/xscale.c index 304477656f..d270bf4f70 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -229,7 +229,7 @@ int xscale_jtag_set_instr(jtag_tap_t *tap, u32 new_instr) field.in_value = NULL; jtag_set_check_value(&field, tap->expected, tap->expected_mask, NULL); - jtag_add_ir_scan(1, &field, -1); + jtag_add_ir_scan(1, &field, TAP_INVALID); free(field.out_value); } @@ -282,7 +282,7 @@ int xscale_read_dcsr(target_t *target) fields[2].in_value = NULL; jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL); - jtag_add_dr_scan(3, fields, -1); + jtag_add_dr_scan(3, fields, TAP_INVALID); if ((retval = jtag_execute_queue()) != ERROR_OK) { @@ -302,7 +302,7 @@ int xscale_read_dcsr(target_t *target) jtag_add_end_state(TAP_IDLE); - jtag_add_dr_scan(3, fields, -1); + jtag_add_dr_scan(3, fields, TAP_INVALID); /* DANGER!!! this must be here. It will make sure that the arguments * to jtag_set_check_value() does not go out of scope! */ @@ -318,7 +318,7 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words) armv4_5_common_t *armv4_5 = target->arch_info; xscale_common_t *xscale = armv4_5->arch_info; - enum tap_state path[3]; + tap_state_t path[3]; scan_field_t fields[3]; u8 *field0 = malloc(num_words * 1); @@ -353,8 +353,6 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words) fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; - - fields[2].tap = xscale->jtag_info.tap; fields[2].num_bits = 1; fields[2].out_value = NULL; @@ -364,7 +362,7 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words) jtag_add_end_state(TAP_IDLE); xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dbgtx); - jtag_add_runtest(1, -1); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */ + jtag_add_runtest(1, TAP_INVALID); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */ /* repeat until all words have been collected */ int attempts=0; @@ -375,8 +373,8 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words) for (i = words_done; i < num_words; i++) { fields[0].in_value = &field0[i]; - fields[1].in_handler = buf_to_u32_handler; - fields[1].in_handler_priv = (u8*)&field1[i]; + fields[1].in_handler = buf_to_u32_handler; /* deprecated! invoke this from user code! */ + fields[1].in_handler_priv = (u8*)&field1[i]; jtag_add_pathmove(3, path); jtag_add_dr_scan(3, fields, TAP_IDLE); @@ -429,8 +427,8 @@ int xscale_read_tx(target_t *target, int consume) { armv4_5_common_t *armv4_5 = target->arch_info; xscale_common_t *xscale = armv4_5->arch_info; - enum tap_state path[3]; - enum tap_state noconsume_path[6]; + tap_state_t path[3]; + tap_state_t noconsume_path[6]; int retval; struct timeval timeout, now; @@ -474,8 +472,6 @@ int xscale_read_tx(target_t *target, int consume) fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; - - fields[2].tap = xscale->jtag_info.tap; fields[2].num_bits = 1; fields[2].out_value = NULL; @@ -572,8 +568,6 @@ int xscale_write_rx(target_t *target) fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; - - fields[2].tap = xscale->jtag_info.tap; fields[2].num_bits = 1; fields[2].out_value = &field2; @@ -749,8 +743,6 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk) fields[1].in_check_value = NULL; fields[1].in_check_mask = NULL; - - fields[2].tap = xscale->jtag_info.tap; fields[2].num_bits = 1; fields[2].out_value = &field2; @@ -758,7 +750,7 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk) fields[2].in_value = NULL; jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL); - jtag_add_dr_scan(3, fields, -1); + jtag_add_dr_scan(3, fields, TAP_INVALID); if ((retval = jtag_execute_queue()) != ERROR_OK) { @@ -830,7 +822,7 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8]) fields[1].in_handler = NULL; fields[1].in_handler_priv = NULL; - jtag_add_dr_scan(2, fields, -1); + jtag_add_dr_scan(2, fields, TAP_INVALID); fields[0].num_bits = 32; fields[0].out_value = packet; @@ -842,7 +834,7 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8]) { buf_set_u32(packet, 0, 32, buffer[word]); cmd = parity(*((u32*)packet)); - jtag_add_dr_scan(2, fields, -1); + jtag_add_dr_scan(2, fields, TAP_INVALID); } jtag_execute_queue(); @@ -888,7 +880,7 @@ int xscale_invalidate_ic_line(target_t *target, u32 va) fields[1].in_handler = NULL; fields[1].in_handler_priv = NULL; - jtag_add_dr_scan(2, fields, -1); + jtag_add_dr_scan(2, fields, TAP_INVALID); return ERROR_OK; } @@ -1458,17 +1450,18 @@ static int xscale_step_inner(struct target_s *target, int current, u32 address, armv4_5_common_t *armv4_5 = target->arch_info; xscale_common_t *xscale = armv4_5->arch_info; - u32 current_pc, next_pc; + u32 next_pc; int retval; int i; - target->debug_reason = DBG_REASON_SINGLESTEP; /* calculate PC of next instruction */ if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK) { - u32 current_opcode; + u32 current_opcode, current_pc; + current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32); + target_read_u32(target, current_pc, ¤t_opcode); LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode); return retval; @@ -1638,7 +1631,7 @@ int xscale_deassert_reset(target_t *target) u32 binary_size; u32 buf_cnt; - int i; + u32 i; int retval; breakpoint_t *breakpoint = target->breakpoints; @@ -1718,7 +1711,7 @@ int xscale_deassert_reset(target_t *target) for (; buf_cnt < 32; buf_cnt += 4) { - cache_line[buf_cnt / 4] = 0xe1a08008; + cache_line[buf_cnt / 4] = 0xe1a08008; } /* only load addresses other than the reset vectors */ @@ -1766,19 +1759,16 @@ int xscale_deassert_reset(target_t *target) jtag_add_reset(0, 0); } - return ERROR_OK; } int xscale_soft_reset_halt(struct target_s *target) { - return ERROR_OK; } int xscale_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode) { - return ERROR_OK; } @@ -1938,7 +1928,7 @@ int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count armv4_5_common_t *armv4_5 = target->arch_info; xscale_common_t *xscale = armv4_5->arch_info; u32 *buf32; - int i; + u32 i; int retval; LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count); @@ -2243,7 +2233,6 @@ int xscale_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) } return ERROR_OK; - } int xscale_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) @@ -2944,7 +2933,7 @@ int xscale_analyze_trace(target_t *target, command_context_t *cmd_ctx) (((instruction.type == ARM_B) || (instruction.type == ARM_BL) || (instruction.type == ARM_BLX)) && - (instruction.info.b_bl_bx_blx.target_address != -1))) + (instruction.info.b_bl_bx_blx.target_address != 0xffffffff))) { xscale->trace.current_pc = instruction.info.b_bl_bx_blx.target_address; } @@ -3041,7 +3030,6 @@ int xscale_init_target(struct command_context_s *cmd_ctx, struct target_s *targe int xscale_quit(void) { - return ERROR_OK; } @@ -3267,7 +3255,6 @@ static int xscale_virt2phys(struct target_s *target, u32 virtual, u32 *physical) int domain; u32 ap; - if ((retval = xscale_get_arch_pointers(target, &armv4_5, &xscale)) != ERROR_OK) { return retval; @@ -3295,7 +3282,6 @@ static int xscale_mmu(struct target_s *target, int *enabled) return ERROR_OK; } - int xscale_handle_mmu_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc) { target_t *target = get_current_target(cmd_ctx);