X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Fboard%2Fstm3210e_eval.cfg;h=f30253c1166ee231c0670376a58bce6019d14198;hb=2053120ba10d68339c61cd2b247bde01bda41ab7;hp=b1da54c4d8bf029f5df301e9b4d5535d4f7a5846;hpb=9f18afc39edaf85fccd9b8392067f43fe1a2d295;p=openocd.git

diff --git a/tcl/board/stm3210e_eval.cfg b/tcl/board/stm3210e_eval.cfg
index b1da54c4d8..f30253c116 100644
--- a/tcl/board/stm3210e_eval.cfg
+++ b/tcl/board/stm3210e_eval.cfg
@@ -1,11 +1,10 @@
 # This is an STM32 eval board with a single STM32F103ZET6 chip.
 # http://www.st.com/internet/evalboard/product/204176.jsp
 
-# increase working area for faster flash programming
+# increase working area to 32KB for faster flash programming
+set WORKAREASIZE 0x8000
 
-set WORKAREASIZE 32768
-
-source [find target/stm32.cfg]
+source [find target/stm32f1x.cfg]
 
 #
 # configure FSMC Bank 1 (NOR/PSRAM Bank 2) NOR flash
@@ -18,11 +17,11 @@ flash bank $_FLASHNAME cfi 0x64000000 0x01000000 2 2 $_TARGETNAME
 proc stm32_enable_fsmc {} {
 
 	echo "Enabling FSMC Bank 1 (NOR/PSRAM Bank 2)"
-	
+
 	# enable gpio (defg) clocks for fsmc
 	# RCC_APB2ENR
 	mww 0x40021018 0x000001E0
-	
+
 	# enable fsmc clock
 	# RCC_AHBENR
 	mww 0x40021014 0x00000114
@@ -32,29 +31,29 @@ proc stm32_enable_fsmc {} {
 	mww 0x40011400 0x44BB44BB
 	# GPIOD_CRH
 	mww 0x40011404 0xBBBBBBBB
-	
+
 	# GPIOE_CRL
 	mww 0x40011800 0xBBBBB444
 	# GPIOE_CRH
 	mww 0x40011804 0xBBBBBBBB
-	
+
 	# GPIOF_CRL
 	mww 0x40011C00 0x44BBBBBB
 	# GPIOF_CRH
 	mww 0x40011C04 0xBBBB4444
-	
+
 	# GPIOG_CRL
 	mww 0x40012000 0x44BBBBBB
 	# GPIOG_CRH
 	mww 0x40012004 0x444444B4
-	
+
 	# setup fsmc timings
 	# FSMC_BCR1
 	mww 0xA0000008 0x00001058
-	
+
 	# FSMC_BTR1
 	mww 0xA000000C 0x10000502
-	
+
 	# FSMC_BCR1 - enable fsmc
 	mww 0xA0000008 0x00001059
 }