X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Fboard%2Fstm3220g_eval_stlink.cfg;h=b58e42fe5d85ed30490f51056330a74daa138c18;hb=2053120ba10d68339c61cd2b247bde01bda41ab7;hp=55856cf051e7e2158e2f91db32ff0ded127191d8;hpb=c7384117c66e8f18896ca09ab8095d6da16bb1e5;p=openocd.git

diff --git a/tcl/board/stm3220g_eval_stlink.cfg b/tcl/board/stm3220g_eval_stlink.cfg
index 55856cf051..b58e42fe5d 100644
--- a/tcl/board/stm3220g_eval_stlink.cfg
+++ b/tcl/board/stm3220g_eval_stlink.cfg
@@ -4,7 +4,7 @@
 #
 # This is for using the onboard STLINK/V2
 
-source [find interface/stlink-v2.cfg]
+source [find interface/stlink.cfg]
 
 transport select hla_swd
 
@@ -16,5 +16,4 @@ set CHIPNAME STM32F207IGH6
 
 source [find target/stm32f2x.cfg]
 
-# use hardware reset, connect under reset
-reset_config srst_only srst_nogate
+reset_config srst_only