X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Fchip%2Fst%2Fstm32%2Fstm32_rcc.tcl;h=fa652a2e65de9780bee9fb1f35483ca94ecf5225;hb=f5657aa76e795e4ed5b13a9f5df943181a123e49;hp=07718b649398394787468efe2d15a5314fbccab0;hpb=82b6a41117fa99e760681d9f31163e7b68357e71;p=openocd.git

diff --git a/tcl/chip/st/stm32/stm32_rcc.tcl b/tcl/chip/st/stm32/stm32_rcc.tcl
index 07718b6493..fa652a2e65 100644
--- a/tcl/chip/st/stm32/stm32_rcc.tcl
+++ b/tcl/chip/st/stm32/stm32_rcc.tcl
@@ -1,14 +1,14 @@
 
-set RCC_CR            [expr $RCC_BASE + 0x00]
-set RCC_CFGR          [expr $RCC_BASE + 0x04]
-set RCC_CIR           [expr $RCC_BASE + 0x08]
-set RCC_APB2RSTR      [expr $RCC_BASE + 0x0c]
-set RCC_APB1RSTR      [expr $RCC_BASE + 0x10]
-set RCC_AHBENR        [expr $RCC_BASE + 0x14]
-set RCC_APB2ENR       [expr $RCC_BASE + 0x18]
-set RCC_APB1ENR       [expr $RCC_BASE + 0x1c]
-set RCC_BDCR          [expr $RCC_BASE + 0x20]
-set RCC_CSR           [expr $RCC_BASE + 0x24]
+set RCC_CR            [expr {$RCC_BASE + 0x00}]
+set RCC_CFGR          [expr {$RCC_BASE + 0x04}]
+set RCC_CIR           [expr {$RCC_BASE + 0x08}]
+set RCC_APB2RSTR      [expr {$RCC_BASE + 0x0c}]
+set RCC_APB1RSTR      [expr {$RCC_BASE + 0x10}]
+set RCC_AHBENR        [expr {$RCC_BASE + 0x14}]
+set RCC_APB2ENR       [expr {$RCC_BASE + 0x18}]
+set RCC_APB1ENR       [expr {$RCC_BASE + 0x1c}]
+set RCC_BDCR          [expr {$RCC_BASE + 0x20}]
+set RCC_CSR           [expr {$RCC_BASE + 0x24}]
 
 
 proc show_RCC_CR { } {