X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Faduc702x.cfg;h=f7c5ee434278cef78a462b8aa6415cdf4170bbe1;hb=22aff82cae0de384f931b4cea89c4f52ec976407;hp=cdbcf456c52711c0b90d7d78e1fac70368084cbd;hpb=c946358a0610467636ed2922e79a1ae19f843f90;p=openocd.git

diff --git a/tcl/target/aduc702x.cfg b/tcl/target/aduc702x.cfg
index cdbcf456c5..f7c5ee4342 100644
--- a/tcl/target/aduc702x.cfg
+++ b/tcl/target/aduc702x.cfg
@@ -2,22 +2,22 @@
 ##
 
 
-if { [info exists CHIPNAME] } {	
-   set  _CHIPNAME $CHIPNAME    
-} else {	 
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
    set  _CHIPNAME aduc702x
 }
 
-if { [info exists ENDIAN] } {	
-   set  _ENDIAN $ENDIAN    
-} else {	 
+if { [info exists ENDIAN] } {
+   set  _ENDIAN $ENDIAN
+} else {
   # This config file was defaulting to big endian..
    set  _ENDIAN little
 }
 
-if { [info exists CPUTAPID] } {	
-   set  _CPUTAPID $CPUTAPID    
-} else {	 
+if { [info exists CPUTAPID] } {
+   set  _CPUTAPID $CPUTAPID
+} else {
    set  _CPUTAPID 0x3f0f0f0f
 }
 
@@ -26,7 +26,7 @@ jtag_nsrst_delay 200
 jtag_ntrst_delay 200
 
 # This is for the case that TRST/SRST is not wired on your JTAG adaptor.
-# Don't really need them anyways.  
+# Don't really need them anyways.
 reset_config none
 
 ## JTAG scan chain
@@ -36,7 +36,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 ##
 ## Target configuration
 ##
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # allocate the entire SRAM as working area