X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fat91sam9260_ext_RAM_ext_flash.cfg;h=9ab7409048eb7aada94386feb62375d72874db3e;hb=45b4998e9369029d48c1f33fbccb1a525793cd46;hp=8df2852763131175510809c1852c444bd54cb631;hpb=e941805713fd2ad8b7f9740ae789b8a1f5b645ff;p=openocd.git

diff --git a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
index 8df2852763..9ab7409048 100644
--- a/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
+++ b/tcl/target/at91sam9260_ext_RAM_ext_flash.cfg
@@ -6,7 +6,7 @@ source [find target/at91sam9261.cfg]
 
 reset_config trst_and_srst
 
-jtag_rclk 4
+adapter_khz 4
 
 adapter_nsrst_delay 200
 jtag_ntrst_delay 200
@@ -14,7 +14,7 @@ jtag_ntrst_delay 200
 scan_chain
 $_TARGETNAME configure -event reset-start {
 	# at reset chip runs at 32khz
-	jtag_rclk 8
+	adapter_khz 8
 }
 
 $_TARGETNAME configure -event reset-init {at91sam_init}
@@ -27,7 +27,7 @@ flash bank $_FLASHNAME cfi 0x10000000 0x01000000 2 2 $_TARGETNAME
 # Faster memory downloads. This is disabled automatically during
 # reset init since all reset init sequences are too short for
 # fast memory access
-arm7_9 dcc_downloads enable     
+arm7_9 dcc_downloads enable
 arm7_9 fast_memory_access enable
 
 proc at91sam_init { } {
@@ -46,7 +46,7 @@ proc at91sam_init { } {
 	sleep 10                          ;# wait 10 ms
 
 	# Now run at anything fast... ie: 10mhz!
-	jtag_rclk 10000                    ;# Increase JTAG Speed to 6 MHz
+	adapter_khz 10000                    ;# Increase JTAG Speed to 6 MHz
 
 	mww 0xffffec00 0x0a0a0a0a         ;# SMC_SETUP0 : Setup SMC for Intel NOR Flash JS28F128P30T85 128MBit
 	mww 0xffffec04 0x0b0b0b0b         ;# SMC_PULSE0