X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fomap4460.cfg;h=9c40e62d00765c002e1a21ed055ba7477afdbfc3;hb=f9e82f3ffb5dcf6a11770a79b193812f94de8582;hp=6e8acda5a8e9edd50a67e9a3fc67270914b52ac6;hpb=28c0f2befc4f4a6bd481b4bc224d0f14f4db5de8;p=openocd.git

diff --git a/tcl/target/omap4460.cfg b/tcl/target/omap4460.cfg
index 6e8acda5a8..9c40e62d00 100644
--- a/tcl/target/omap4460.cfg
+++ b/tcl/target/omap4460.cfg
@@ -94,7 +94,7 @@ set _coreid 0
 set _dbgbase [expr 0x80000000 | ($_coreid << 13)]
 echo "Using dbgbase = [format 0x%x $_dbgbase]"
 
-target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.dap \
+target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap \
   -coreid 0 -dbgbase $_dbgbase
 
 # SRAM: 56KiB at 0x4030.0000
@@ -104,8 +104,8 @@ $_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x1000
 #
 # M3 targets, separate TAP/DAP for each core
 #
-target create $_CHIPNAME.m30 cortex_m3 -chain-position $_CHIPNAME.m30_dap
-target create $_CHIPNAME.m31 cortex_m3 -chain-position $_CHIPNAME.m31_dap
+target create $_CHIPNAME.m30 cortex_m -chain-position $_CHIPNAME.m30_dap
+target create $_CHIPNAME.m31 cortex_m -chain-position $_CHIPNAME.m31_dap
 
 
 # Once the JRC is up, enable our TAPs