X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fpic32mx.cfg;h=d53b99a587cf82e3240ec7611e5ca8e52c749c4b;hb=1f37b94859e01c565219a7e7d6ddd85d122f7892;hp=202668b88ae57a5ed317f9b9b9fbe104e54c66cc;hpb=94dc7c0a939c042c71767b5cbdc1e1327ccecbea;p=openocd.git

diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
index 202668b88a..d53b99a587 100644
--- a/tcl/target/pic32mx.cfg
+++ b/tcl/target/pic32mx.cfg
@@ -1,31 +1,28 @@
-
 if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
+   set _CHIPNAME $CHIPNAME
 } else {
-   set  _CHIPNAME pic32mx
+   set _CHIPNAME pic32mx
 }
 
 if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
+   set _ENDIAN $ENDIAN
 } else {
-   set  _ENDIAN little
+   set _ENDIAN little
 }
 
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
 } else {
-   # force an error till we get a good number
    set _CPUTAPID 0x30938053
 }
 
 # default working area is 16384
 if { [info exists WORKAREASIZE] } {
-   set  _WORKAREASIZE $WORKAREASIZE
+   set _WORKAREASIZE $WORKAREASIZE
 } else {
-   set  _WORKAREASIZE 0x4000
+   set _WORKAREASIZE 0x4000
 }
 
-
 adapter_nsrst_delay 100
 jtag_ntrst_delay 100
 
@@ -43,7 +40,7 @@ target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAM
 #
 
 global _PIC32MX_DATASIZE
-global _PIC32MX_PROGSIZE
+global _WORKAREASIZE
 set _PIC32MX_DATASIZE 0x800
 set _PIC32MX_PROGSIZE [expr ($_WORKAREASIZE - $_PIC32MX_DATASIZE)]
 
@@ -53,18 +50,31 @@ $_TARGETNAME configure -event reset-init {
 	# from reset the pic32 cannot execute code in ram - enable ram execution
 	# minimum offset from start of ram is 2k
 	#
-
 	global _PIC32MX_DATASIZE
-	global _PIC32MX_PROGSIZE
+	global _WORKAREASIZE
 
-	# BMXCON
-	mww 0xbf882000 0x001f0040
-	# BMXDKPBA: 2k kernel data @ 0xa0000800
+	# BMXCON	set 0 wait state option by clearing BMXWSDRM bit, bit 6
+	mww 0xbf882000 0x001f0000
+	# BMXDKPBA: 2k kernel data @ 0xa0000000
 	mww 0xbf882010 $_PIC32MX_DATASIZE
-	# BMXDUDBA: 16k kernel program @ 0xa0000800
-	mww 0xbf882020 $_PIC32MX_PROGSIZE
-	# BMXDUPBA: 0k user program
-	mww 0xbf882030 $_PIC32MX_PROGSIZE
+	# BMXDUDBA: 14k kernel program @ 0xa0000800 - (BMXDUDBA - BMXDKPBA)
+	mww 0xbf882020 $_WORKAREASIZE
+	# BMXDUPBA: 0k user program - (BMXDUPBA - BMXDUDBA)
+	mww 0xbf882030 $_WORKAREASIZE
+
+	#
+	# Set system clock to 8Mhz if the default clock configuration is set
+	#
+
+	# SYSKEY register, make sure OSCCON is locked
+	mww 0xbf80f230 0x0
+	# SYSKEY register, write unlock sequence
+	mww 0xbf80f230 0xaa996655
+	mww 0xbf80f230 0x556699aa
+	# OSCCON register + 4, clear OSCCON FRCDIV bits: 24, 25 and 26, divided by 1
+	mww 0xbf80f004 0x07000000
+	# SYSKEY register, relock OSCCON
+	mww 0xbf80f230 0x0
 }
 
 set _FLASHNAME $_CHIPNAME.flash0
@@ -78,6 +88,3 @@ flash bank $_FLASHNAME pic32mx 0x1d000000 0 0 0 $_TARGETNAME
 # add virtual banks for kseg0 and kseg1
 flash bank vbank2 virtual 0xbd000000 0 0 0 $_TARGETNAME $_FLASHNAME
 flash bank vbank3 virtual 0x9d000000 0 0 0 $_TARGETNAME $_FLASHNAME
-
-# For more information about the configuration files, take a look at:
-# openocd.texi