X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fpxa3xx.cfg;h=c459f6eaaec226bee7455745e685d88a6249313b;hb=afbad69d97938b8c35d7d416e38403cb4e58f803;hp=62c325b76f9b90a42d22683fd1ead8065f44bdbb;hpb=b559b273b526b3077b3ca219eecc8df9f86efac0;p=openocd.git

diff --git a/tcl/target/pxa3xx.cfg b/tcl/target/pxa3xx.cfg
index 62c325b76f..c459f6eaae 100644
--- a/tcl/target/pxa3xx.cfg
+++ b/tcl/target/pxa3xx.cfg
@@ -1,59 +1,59 @@
 # Marvell PXA3xx
 
 if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
+   set _CHIPNAME $CHIPNAME
 } else {
-   set  _CHIPNAME pxa3xx
+   set _CHIPNAME pxa3xx
 }
 
 if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
+   set _ENDIAN $ENDIAN
 } else {
-   set  _ENDIAN little
+   set _ENDIAN little
 }
 
 # IDs for all currently known PXA3xx chips
-if { [info exists CPUTAPID_PXA30X_A0 ] } {
+if { [info exists CPUTAPID_PXA30X_A0] } {
    set _CPUTAPID_PXA30X_A0 $CPUTAPID_PXA30X_A0
 } else {
    set _CPUTAPID_PXA30X_A0 0x0E648013
 }
-if { [info exists CPUTAPID_PXA30X_A1 ] } {
+if { [info exists CPUTAPID_PXA30X_A1] } {
    set _CPUTAPID_PXA30X_A1 $CPUTAPID_PXA30X_A1
 } else {
    set _CPUTAPID_PXA30X_A1 0x1E648013
 }
-if { [info exists CPUTAPID_PXA31X_A0 ] } {
+if { [info exists CPUTAPID_PXA31X_A0] } {
    set _CPUTAPID_PXA31X_A0 $CPUTAPID_PXA31X_A0
 } else {
    set _CPUTAPID_PXA31X_A0 0x0E649013
 }
-if { [info exists CPUTAPID_PXA31X_A1 ] } {
+if { [info exists CPUTAPID_PXA31X_A1] } {
    set _CPUTAPID_PXA31X_A1 $CPUTAPID_PXA31X_A1
 } else {
    set _CPUTAPID_PXA31X_A1 0x1E649013
 }
-if { [info exists CPUTAPID_PXA31X_A2 ] } {
+if { [info exists CPUTAPID_PXA31X_A2] } {
    set _CPUTAPID_PXA31X_A2 $CPUTAPID_PXA31X_A2
 } else {
    set _CPUTAPID_PXA31X_A2 0x2E649013
 }
-if { [info exists CPUTAPID_PXA31X_B0 ] } {
+if { [info exists CPUTAPID_PXA31X_B0] } {
    set _CPUTAPID_PXA31X_B0 $CPUTAPID_PXA31X_B0
 } else {
    set _CPUTAPID_PXA31X_B0 0x3E649013
 }
-if { [info exists CPUTAPID_PXA32X_B1 ] } {
+if { [info exists CPUTAPID_PXA32X_B1] } {
    set _CPUTAPID_PXA32X_B1 $CPUTAPID_PXA32X_B1
 } else {
    set _CPUTAPID_PXA32X_B1 0x5E642013
 }
-if { [info exists CPUTAPID_PXA32X_B2 ] } {
+if { [info exists CPUTAPID_PXA32X_B2] } {
    set _CPUTAPID_PXA32X_B2 $CPUTAPID_PXA32X_B2
 } else {
    set _CPUTAPID_PXA32X_B2 0x6E642013
 }
-if { [info exists CPUTAPID_PXA32X_C0 ] } {
+if { [info exists CPUTAPID_PXA32X_C0] } {
    set _CPUTAPID_PXA32X_C0 $CPUTAPID_PXA32X_C0
 } else {
    set _CPUTAPID_PXA32X_C0 0x7E642013
@@ -80,7 +80,7 @@ jtag newtap $_CHIPNAME cpu -irlen 11 -ircapture 0x1 -irmask 0x7f \
 	-expected-id $_CPUTAPID_PXA32X_C0
 
 target create $_TARGETNAME xscale -endian $_ENDIAN \
-	-chain-position $_TARGETNAME -variant pxa3xx
+	-chain-position $_TARGETNAME
 
 # work area in internal RAM.
 $_TARGETNAME configure -work-area-phys 0x5c030000 -work-area-size 0x10000