X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fsamsung_s3c2450.cfg;h=248255719839c97f43aaaafc11ded8a8bfae9881;hb=38ac08c1c25adf42cf20e48e10e6ddeab6a12d71;hp=071b271a03541351993176008852133afe410199;hpb=71af49ca7fb11b0bd0c1ba9578826f49288b68ef;p=openocd.git

diff --git a/tcl/target/samsung_s3c2450.cfg b/tcl/target/samsung_s3c2450.cfg
index 071b271a03..2482557198 100644
--- a/tcl/target/samsung_s3c2450.cfg
+++ b/tcl/target/samsung_s3c2450.cfg
@@ -7,29 +7,28 @@
 #
 # RCLK?
 #
-# jtag_khz 0
+# adapter speed 0
 #
 # Really low clock during reset?
 #
-# jtag_khz 1
+# adapter speed 1
 
 if { [info exists CHIPNAME] } {
-  set  _CHIPNAME $CHIPNAME
+  set _CHIPNAME $CHIPNAME
 } else {
-  set  _CHIPNAME s3c2450
+  set _CHIPNAME s3c2450
 }
 
 if { [info exists ENDIAN] } {
-  set  _ENDIAN $ENDIAN
+  set _ENDIAN $ENDIAN
 } else {
  # this defaults to a bigendian
-  set  _ENDIAN little
+  set _ENDIAN little
 }
 
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
   set _CPUTAPID $CPUTAPID
 } else {
- # force an error till we get a good number
   set _CPUTAPID 0x07926f0f
 }
 
@@ -37,7 +36,7 @@ if { [info exists CPUTAPID ] } {
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xE -irmask 0x0f -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # FIX!!!!! should this really use srst_pulls_trst?
 # With srst_pulls_trst "reset halt" will not reset into the