X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=tcl%2Ftarget%2Fstellaris.cfg;h=7fffd2a7ca03f03df7293a4c093926854567647b;hb=1f37b94859e01c565219a7e7d6ddd85d122f7892;hp=a272e66f487a0dc34dcee789a5d3f1bb1a478a5e;hpb=ca45e700b1c57caca2ef08e665e3c7e3e02ac8d3;p=openocd.git

diff --git a/tcl/target/stellaris.cfg b/tcl/target/stellaris.cfg
index a272e66f48..7fffd2a7ca 100644
--- a/tcl/target/stellaris.cfg
+++ b/tcl/target/stellaris.cfg
@@ -28,7 +28,8 @@ if { [info exists CHIPNAME] } {
 # CPU TAP ID 0x1ba00477 for early Sandstorm parts
 # CPU TAP ID 0x2ba00477 for later SandStorm parts, e.g. lm3s811 Rev C2
 # CPU TAP ID 0x3ba00477 for Cortex-M3 r1p2 (on Fury, DustDevil)
-# CPU TAP ID 0x4ba00477 for Cortex-M3 r2p0 (on Tempest)
+# CPU TAP ID 0x4ba00477 for Cortex-M3 r2p0 (on Tempest, Firestorm)
+# CPU TAP ID 0x4ba00477 for Cortex-M4 r0p1 (on Blizzard)
 # ... we'll ignore the JTAG version field, rather than list every
 # chip revision that turns up.
 if { [info exists CPUTAPID] } {
@@ -41,17 +42,18 @@ if { [info exists CPUTAPID] } {
 # ... even though SWD ignores all except TAPID, and
 # JTAG shouldn't need anything more then irlen. (and TAPID).
 swj_newdap $_CHIPNAME cpu -irlen 4 -irmask 0xf \
- 	-expected-id $_CPUTAPID -ignore-version
+    -expected-id $_CPUTAPID -ignore-version
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE $WORKAREASIZE
 } else {
-   # default to 8K working area
-   set _WORKAREASIZE 0x2000
+   # default to 2K working area
+   set _WORKAREASIZE 0x800
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
 
 # 8K working area at base of ram, not backed up
 #
@@ -132,7 +134,7 @@ proc reset_peripherals {family} {
 $_TARGETNAME configure -event reset-start {
 	adapter_khz 500
 
-	#	
+	#
 	# When nRST is asserted on most Stellaris devices, it clears some of
 	# the debug state.  The ARMv7M and Cortex-M3 TRMs say that's wrong;
 	# and OpenOCD depends on those TRMs.  So we won't use SRST on those
@@ -154,14 +156,17 @@ $_TARGETNAME configure -event reset-start {
 	}
 
 	if {$device_class == 0 || $device_class == 1 ||
-		$device_class == 3 || $device_class == 5} {
-		# Sandstorm, Fury, DustDevil and Blizzard are able to use NVIC SYSRESETREQ
-		cortex_m3 reset_config sysresetreq
+		$device_class == 3 || $device_class == 5 || $device_class == 0xa} {
+		if {![using_hla]} {
+		   # Sandstorm, Fury, DustDevil, Blizzard and Snowflake are able to use NVIC SYSRESETREQ
+		   cortex_m reset_config sysresetreq
+		}
 	} else {
-		# Tempest and Firestorm default to using NVIC VECTRESET
-		# peripherals will need reseting manually, see proc reset_peripherals
-		cortex_m3 reset_config vectreset
-
+		if {![using_hla]} {
+		   # Tempest and Firestorm default to using NVIC VECTRESET
+		   # peripherals will need reseting manually, see proc reset_peripherals
+		   cortex_m reset_config vectreset
+		}
 		# reset peripherals, based on code in
 		# http://www.ti.com/lit/er/spmz573a/spmz573a.pdf
 		reset_peripherals $device_class