Code Review / openocd.git / commit
? search:
summary | shortlog | log | commit | commitdiff | review | tree
(parent: a26ee53) | patch
flash/stm32f1x: add support for RISC-V GigaDevice GD32VF103 04/6704/12
authorTomas Vanek <vanekt@fbl.cz>
Tue, 16 Nov 2021 11:23:48 +0000 (12:23 +0100)
committerTomas Vanek <vanekt@fbl.cz>
Sun, 24 Apr 2022 08:26:08 +0000 (08:26 +0000)
commitf2b4897773a1c9db185dfb61d474055559fd507a
tree6793b031e3173502fca50d4b3619ceaab3af51d8tree | snapshot
parenta26ee5344cf70e068265ac2f03a2915fae070e14commit | diff
flash/stm32f1x: add support for RISC-V GigaDevice GD32VF103

The device has compatible flash macro with STM32F1 family, reuse
stm32f1x driver code.

Detect non-ARM target - for simplicy test target type name 'riscv'
and the address has 32 bits.

In case of RISC-V CPU use simple chunked write algo - async algo
cannot be used as the core implemented in this device doesn't
allow memory access while running.

Change-Id: Ie3886fbd8573652691f91a02335812a7300689f7
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6704
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
contrib/loaders/flash/gd32vf103/Makefile [new file with mode: 0644] blob
contrib/loaders/flash/gd32vf103/gd32vf103.c [new file with mode: 0644] blob
contrib/loaders/flash/gd32vf103/gd32vf103.inc [new file with mode: 0644] blob
doc/openocd.texi diff | blob | history
src/flash/nor/stm32f1x.c diff | blob | history
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)