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target/mips32: rework mips core register related functions 64/7864/11
authorWalter Ji <walter.ji@oss.cipunited.com>
Tue, 26 Sep 2023 08:56:02 +0000 (16:56 +0800)
committerAntonio Borneo <borneo.antonio@gmail.com>
Wed, 25 Oct 2023 01:33:10 +0000 (01:33 +0000)
commit18c64af13500342da5dc304cb3f2024078815bd4
treea5c69dbc6afa31790053b6848961f1f72abe80a3tree | snapshot
parentc7d1f0ddabb301e00738686671b939bb92a06ed9commit | diff
target/mips32: rework mips core register related functions

Update mips core definitions.
Reworked mips core register structure and read/write function.
Add coprocessor0 register definitions for target configuration.

Change-Id: I59c1f4cc4020db8a78e8d79f7421b87382fa1709
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7864
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
src/target/mips32.c diff | blob | history
src/target/mips32.h diff | blob | history
src/target/mips32_pracc.c diff | blob | history
src/target/mips32_pracc.h diff | blob | history
src/target/mips_ejtag.h diff | blob | history
src/target/mips_m4k.c diff | blob | history
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