target/nrf52: Create and configure TPIU 01/7901/4
authorFrank Plowman <post@frankplowman.com>
Sun, 17 Sep 2023 18:20:04 +0000 (19:20 +0100)
committerAntonio Borneo <borneo.antonio@gmail.com>
Sat, 7 Oct 2023 14:46:52 +0000 (14:46 +0000)
Firstly, create the TPIU nrf52.tpiu if using the nrf52 target. This is
standard, using AP 0 and TPIU base address 0xE0040000.
Secondly, add a pre_enable handler for this TPIU which configures the
TRACEMUX field of the TRACECONFIG register. This register is reset
every time the MCU resets, so the pre_enable handler creates a
reset-end handler to ensure the register remains set.

Change-Id: I408b20fc03dc2060c21bad0c21ed713eee55a113
Signed-off-by: Frank Plowman <post@frankplowman.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7901
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
tcl/target/nrf52.cfg

index 2539be049d1427047fcce98e8e1d7e41f506f27b..0c82c5758a532b24ceade280256babab06421782 100644 (file)
@@ -5,6 +5,7 @@
 #
 
 source [find target/swj-dp.tcl]
+source [find mem_helper.tcl]
 
 if { [info exists CHIPNAME] } {
        set _CHIPNAME $CHIPNAME
@@ -116,3 +117,51 @@ proc nrf52_recover {} {
 }
 
 add_help_text nrf52_recover "Mass erase and unlock nRF52 device"
+
+tpiu create $_CHIPNAME.tpiu -dap $_CHIPNAME.dap -ap-num 0 -baseaddr 0xE0040000
+
+lappend _telnet_autocomplete_skip _proc_pre_enable_$_CHIPNAME.tpiu
+proc _proc_pre_enable_$_CHIPNAME.tpiu {_targetname _chipname} {
+       targets $_targetname
+
+       # Read FICR.INFO.PART
+       set PART [mrw 0x10000100]
+
+       switch $PART {
+               0x52840 -
+               0x52833 -
+               0x52832 {
+                       if { [$_chipname.tpiu cget -protocol] eq "sync" } {
+                               if { [$_chipname.tpiu cget -port-width] != 4 } {
+                                       echo "Error. Device only supports 4-bit sync traces."
+                                       return
+                               }
+
+                               # Set TRACECONFIG.TRACEMUX to enable synchronous trace
+                               mmw 0x4000055C 0x00020000 0x00010000
+                               $_targetname configure -event reset-end {
+                                       mmw 0x4000055C 0x00020000 0x00010000
+                               }
+                       } else {
+                               # Set TRACECONFIG.TRACEMUX to enable SWO
+                               mmw 0x4000055C 0x00010000 0x00020000
+                               $_targetname configure -event reset-end {
+                                       mmw 0x4000055C 0x00010000 0x00020000
+                               }
+                       }
+               }
+               0x52820 -
+               0x52811 -
+               0x52810 -
+               0x52805 {
+                       echo "Error: Device does not support TPIU"
+                       return
+               }
+               default {
+                       echo "Error: Unknown device"
+                       return
+               }
+       }
+}
+
+$_CHIPNAME.tpiu configure -event pre-enable "_proc_pre_enable_$_CHIPNAME.tpiu $_TARGETNAME $_CHIPNAME"

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