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target/cortex_m,hla_target: rework Cortex-M register handling part 4 64/5864/6
authorTomas Vanek <vanekt@fbl.cz>
Wed, 14 Oct 2020 19:03:02 +0000 (21:03 +0200)
committerAntonio Borneo <borneo.antonio@gmail.com>
Sun, 15 Nov 2020 21:06:45 +0000 (21:06 +0000)
Consolidate low level register read/write.

Floating point registers were handled by target_read/write_u32
unlike other registers handled by cortexm_dap_read/write_coreregister_u32
There is no reason to do so in cortex_m.
Remove cortexm_dap_read/write_coreregister_u32
and use cortex_m_load/store_core_reg_u32 directly.

Similarly HLA adapters register read/write interface supports all registers
so use it for any floating point and other registers.

Change-Id: Ida679e5f4fec02d94ffb0bd3f265ed7ed2221cdc
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5864
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
src/target/cortex_m.c patch | blob | history
src/target/hla_target.c patch | blob | history

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 00e7c3a5750a2cfeabd9b7403f6f5f1a5fd4422b..72a2bd322e5f8ed89d942729c40d1cd1a7b01462 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -56,8 +56,8 @@ static int cortex_m_store_core_reg_u32(struct target *target,
                uint32_t num, uint32_t value);
 static void cortex_m_dwt_free(struct target *target);
 
-static int cortexm_dap_read_coreregister_u32(struct target *target,
-       uint32_t *value, int regnum)
+static int cortex_m_load_core_reg_u32(struct target *target,
+               uint32_t regsel, uint32_t *value)
 {
        struct armv7m_common *armv7m = target_to_armv7m(target);
        int retval;
@@ -71,7 +71,7 @@ static int cortexm_dap_read_coreregister_u32(struct target *target,
                        return retval;
        }
 
-       retval = mem_ap_write_u32(armv7m->debug_ap, DCB_DCRSR, regnum);
+       retval = mem_ap_write_u32(armv7m->debug_ap, DCB_DCRSR, regsel);
        if (retval != ERROR_OK)
                return retval;
 
@@ -89,8 +89,8 @@ static int cortexm_dap_read_coreregister_u32(struct target *target,
        return retval;
 }
 
-static int cortexm_dap_write_coreregister_u32(struct target *target,
-       uint32_t value, int regnum)
+static int cortex_m_store_core_reg_u32(struct target *target,
+               uint32_t regsel, uint32_t value)
 {
        struct armv7m_common *armv7m = target_to_armv7m(target);
        int retval;
@@ -108,7 +108,7 @@ static int cortexm_dap_write_coreregister_u32(struct target *target,
        if (retval != ERROR_OK)
                return retval;
 
-       retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DCRSR, regnum | DCRSR_WnR);
+       retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DCRSR, regsel | DCRSR_WnR);
        if (retval != ERROR_OK)
                return retval;
 
@@ -1606,117 +1606,6 @@ void cortex_m_enable_watchpoints(struct target *target)
        }
 }
 
-static int cortex_m_load_core_reg_u32(struct target *target,
-               uint32_t regsel, uint32_t *value)
-{
-       int retval;
-
-       switch (regsel) {
-               case ARMV7M_REGSEL_R0 ... ARMV7M_REGSEL_PSP:
-                       /* read a normal core register */
-                       retval = cortexm_dap_read_coreregister_u32(target, value, regsel);
-
-                       if (retval != ERROR_OK) {
-                               LOG_ERROR("JTAG failure %i", retval);
-                               return ERROR_JTAG_DEVICE_ERROR;
-                       }
-                       LOG_DEBUG("load from core reg %" PRIu32 " value 0x%" PRIx32 "", regsel, *value);
-                       break;
-
-               case ARMV7M_REGSEL_FPSCR:
-                       /* Floating-point Status and Registers */
-                       retval = target_write_u32(target, DCB_DCRSR, ARMV7M_REGSEL_FPSCR);
-                       if (retval != ERROR_OK)
-                               return retval;
-                       retval = target_read_u32(target, DCB_DCRDR, value);
-                       if (retval != ERROR_OK)
-                               return retval;
-                       LOG_DEBUG("load from FPSCR  value 0x%" PRIx32, *value);
-                       break;
-
-               case ARMV7M_REGSEL_S0 ... ARMV7M_REGSEL_S31:
-                       /* Floating-point Status and Registers */
-                       retval = target_write_u32(target, DCB_DCRSR, regsel);
-                       if (retval != ERROR_OK)
-                               return retval;
-                       retval = target_read_u32(target, DCB_DCRDR, value);
-                       if (retval != ERROR_OK)
-                               return retval;
-                       LOG_DEBUG("load from FPU reg S%d  value 0x%" PRIx32,
-                                 (int)(regsel - ARMV7M_REGSEL_S0), *value);
-                       break;
-
-               case ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL:
-                       retval = cortexm_dap_read_coreregister_u32(target, value, ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL);
-                       if (retval != ERROR_OK)
-                               return retval;
-
-                       LOG_DEBUG("load from special reg PRIMASK/BASEPRI/FAULTMASK/CONTROL value 0x%" PRIx32, *value);
-                       break;
-
-               default:
-                       return ERROR_COMMAND_SYNTAX_ERROR;
-       }
-
-       return ERROR_OK;
-}
-
-static int cortex_m_store_core_reg_u32(struct target *target,
-               uint32_t regsel, uint32_t value)
-{
-       int retval;
-       struct armv7m_common *armv7m = target_to_armv7m(target);
-
-       switch (regsel) {
-               case ARMV7M_REGSEL_R0 ... ARMV7M_REGSEL_PSP:
-                       retval = cortexm_dap_write_coreregister_u32(target, value, regsel);
-                       if (retval != ERROR_OK) {
-                               struct reg *r;
-
-                               LOG_ERROR("JTAG failure");
-                               r = armv7m->arm.core_cache->reg_list + regsel; /* TODO: don't use regsel as register index */
-                               r->dirty = r->valid;
-                               return ERROR_JTAG_DEVICE_ERROR;
-                       }
-                       LOG_DEBUG("write core reg %" PRIu32 " value 0x%" PRIx32 "", regsel, value);
-                       break;
-
-               case ARMV7M_REGSEL_FPSCR:
-                       /* Floating-point Status and Registers */
-                       retval = target_write_u32(target, DCB_DCRDR, value);
-                       if (retval != ERROR_OK)
-                               return retval;
-                       retval = target_write_u32(target, DCB_DCRSR, ARMV7M_REGSEL_FPSCR | DCRSR_WnR);
-                       if (retval != ERROR_OK)
-                               return retval;
-                       LOG_DEBUG("write FPSCR value 0x%" PRIx32, value);
-                       break;
-
-               case ARMV7M_REGSEL_S0 ... ARMV7M_REGSEL_S31:
-                       /* Floating-point Status and Registers */
-                       retval = target_write_u32(target, DCB_DCRDR, value);
-                       if (retval != ERROR_OK)
-                               return retval;
-                       retval = target_write_u32(target, DCB_DCRSR, regsel | DCRSR_WnR);
-                       if (retval != ERROR_OK)
-                               return retval;
-                       LOG_DEBUG("write FPU reg S%d  value 0x%" PRIx32,
-                                 (int)(regsel - ARMV7M_REGSEL_S0), value);
-                       break;
-
-               case ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL:
-                       cortexm_dap_write_coreregister_u32(target, value, ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL);
-
-                       LOG_DEBUG("write special reg PRIMASK/BASEPRI/FAULTMASK/CONTROL value 0x%" PRIx32, value);
-                       break;
-
-               default:
-                       return ERROR_COMMAND_SYNTAX_ERROR;
-       }
-
-       return ERROR_OK;
-}
-
 static int cortex_m_read_memory(struct target *target, target_addr_t address,
        uint32_t size, uint32_t count, uint8_t *buffer)
 {
diff --git a/src/target/hla_target.c b/src/target/hla_target.c
index 725c2d2feb54338438e3830f9685a3e977361e32..99afccc490d0e46acc01f1398a63dc82d6c6347e 100644 (file)
--- a/src/target/hla_target.c
+++ b/src/target/hla_target.c
@@ -53,123 +53,15 @@ static inline struct hl_interface_s *target_to_adapter(struct target *target)
 static int adapter_load_core_reg_u32(struct target *target,
                uint32_t regsel, uint32_t *value)
 {
-       int retval;
        struct hl_interface_s *adapter = target_to_adapter(target);
-
-       LOG_DEBUG("%s", __func__);
-
-       /* NOTE:  we "know" here that the register identifiers used
-        * in the v7m header match the Cortex-M3 Debug Core Register
-        * Selector values for R0..R15, xPSR, MSP, and PSP.
-        */
-       switch (regsel) {
-       case ARMV7M_REGSEL_R0 ... ARMV7M_REGSEL_PSP:
-               /* read a normal core register */
-               retval = adapter->layout->api->read_reg(adapter->handle, regsel, value);
-
-               if (retval != ERROR_OK) {
-                       LOG_ERROR("JTAG failure %i", retval);
-                       return ERROR_JTAG_DEVICE_ERROR;
-               }
-               LOG_DEBUG("load from core reg %" PRIu32 " value 0x%" PRIx32 "", regsel, *value);
-               break;
-
-       case ARMV7M_REGSEL_FPSCR:
-               /* Floating-point Status and Registers */
-               retval = target_write_u32(target, ARMV7M_SCS_DCRSR, regsel);
-               if (retval != ERROR_OK)
-                       return retval;
-               retval = target_read_u32(target, ARMV7M_SCS_DCRDR, value);
-               if (retval != ERROR_OK)
-                       return retval;
-               LOG_DEBUG("load from FPSCR  value 0x%" PRIx32, *value);
-               break;
-
-       case ARMV7M_REGSEL_S0 ... ARMV7M_REGSEL_S31:
-               /* Floating-point Status and Registers */
-               retval = target_write_u32(target, ARMV7M_SCS_DCRSR, regsel);
-               if (retval != ERROR_OK)
-                       return retval;
-               retval = target_read_u32(target, ARMV7M_SCS_DCRDR, value);
-               if (retval != ERROR_OK)
-                       return retval;
-               LOG_DEBUG("load from FPU reg S%d  value 0x%" PRIx32,
-                         (int)(regsel - ARMV7M_REGSEL_S0), *value);
-               break;
-
-       case ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL:
-               retval = adapter->layout->api->read_reg(adapter->handle, ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL, value);
-               if (retval != ERROR_OK)
-                       return retval;
-
-               LOG_DEBUG("load from special reg PRIMASK/BASEPRI/FAULTMASK/CONTROL value 0x%" PRIx32, *value);
-               break;
-
-       default:
-               return ERROR_COMMAND_SYNTAX_ERROR;
-       }
-
-       return ERROR_OK;
+       return adapter->layout->api->read_reg(adapter->handle, regsel, value);
 }
 
 static int adapter_store_core_reg_u32(struct target *target,
                uint32_t regsel, uint32_t value)
 {
-       int retval;
-       struct armv7m_common *armv7m = target_to_armv7m(target);
        struct hl_interface_s *adapter = target_to_adapter(target);
-
-       LOG_DEBUG("%s", __func__);
-
-       switch (regsel) {
-       case ARMV7M_REGSEL_R0 ... ARMV7M_REGSEL_PSP:
-               retval = adapter->layout->api->write_reg(adapter->handle, regsel, value);
-
-               if (retval != ERROR_OK) {
-                       struct reg *r;
-
-                       LOG_ERROR("JTAG failure");
-                       r = armv7m->arm.core_cache->reg_list + regsel; /* TODO: don't use regsel as register index */
-                       r->dirty = r->valid;
-                       return ERROR_JTAG_DEVICE_ERROR;
-               }
-               LOG_DEBUG("write core reg %" PRIu32 " value 0x%" PRIx32 "", regsel, value);
-               break;
-
-       case ARMV7M_REGSEL_FPSCR:
-               /* Floating-point Status and Registers */
-               retval = target_write_u32(target, ARMV7M_SCS_DCRDR, value);
-               if (retval != ERROR_OK)
-                       return retval;
-               retval = target_write_u32(target, ARMV7M_SCS_DCRSR, ARMV7M_REGSEL_FPSCR | DCRSR_WnR);
-               if (retval != ERROR_OK)
-                       return retval;
-               LOG_DEBUG("write FPSCR value 0x%" PRIx32, value);
-               break;
-
-       case ARMV7M_REGSEL_S0 ... ARMV7M_REGSEL_S31:
-               /* Floating-point Status and Registers */
-               retval = target_write_u32(target, ARMV7M_SCS_DCRDR, value);
-               if (retval != ERROR_OK)
-                       return retval;
-               retval = target_write_u32(target, ARMV7M_SCS_DCRSR, regsel | DCRSR_WnR);
-               if (retval != ERROR_OK)
-                       return retval;
-               LOG_DEBUG("write FPU reg S%d  value 0x%" PRIx32,
-                         (int)(regsel - ARMV7M_REGSEL_S0), value);
-               break;
-
-       case ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL:
-               adapter->layout->api->write_reg(adapter->handle, ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL, value);
-
-               LOG_DEBUG("write special reg PRIMASK/BASEPRI/FAULTMASK/CONTROL value 0x%" PRIx32, value);
-               break;
-
-       default:
-               return ERROR_COMMAND_SYNTAX_ERROR;
-       }
-
-       return ERROR_OK;
+       return adapter->layout->api->write_reg(adapter->handle, regsel, value);
 }
 
 static int adapter_examine_debug_reason(struct target *target)
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